Formal VLSI correctness verification : proceedings of the IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design

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Formal VLSI correctness verification : proceedings of the IFIP WG 10.2/WG 10.5 International Workshop on Applied Formal Methods for Correct VLSI Design / sponsored by IMEC, Houthalen, Belgium, 13-16 November, 1989 ; edited by Luc J.M. Claesen

資料種別:

図書

出版情報:

Amsterdam ; New York : North-Holland
New York, N.Y. : Distributed in the U.S. and Canada, Elsevier Science Pub. Co., 1990

形態:

xv, 427 p. ; 24 cm

シリーズ名:

VLSI Design methods ; v. 2 <BA10229635>

著者名:

ISBN:

9780444886880 [0444886885]

書誌ID:

BA10229690

子書誌情報

フルテキスト

所蔵情報

他の版・巻

書誌詳細

注記:	Includes bibliographical references
主題:	Computer-aided design--Congresses; Integrated circuits--Very large scale integration--Design and construction--Data processing--Congresses; Integrated circuits--Very large scale integration--Testing--Congresses
言語:	英語

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