Proceedings : 15th IEEE Symposium on Computer Arithmetic, ARITH-15 2001, Vail, Colorado 11-13 June 2001

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Proceedings : 15th IEEE Symposium on Computer Arithmetic, ARITH-15 2001, Vail, Colorado 11-13 June 2001 / editors, Neil Burgess, Luigi Ciminiera ; sponsored by the IEEE Computer Society Technical Committee on VLSI

資料種別:

図書

出版情報:

Los Alamitos, Calif. : IEEE Computer Society, c2001

形態:

xii, 285 p. ; 29 cm

著者名:

ISBN:

9780769511504 [0769511503] (: case)

書誌ID:

BA52946698

子書誌情報

フルテキスト

所蔵情報

他の版・巻

書誌詳細

その他の標題:

PR01150

注記:

"IEEE Computer Society order number PR01150" -- T. p. verso
Includes bibliographical references and index

主題:

Computer arithmetic--Congresses; Electronic digital computers--Programming--Congresses; Floating-point arithmetic--Congresses

言語:

英語

目次情報:

Foreword

Committees

Additional Reviewers

Keynote Speech

Computer Arithmetic--A Processor Architect's Perspective / Ruby B. Lee

Binary Strings in Computer Arithmetic / Session 1：

Leading Zero Anticipation and Detection--A Comparison of Methods / M. S. Schmookler ; K. J. Nowka

Bounds on Runs of Zeros and Ones for Algebraic Functions / T. Lang ; J.-M. Muller

Multiplication and Exponentiation / Session 2：

Binary Multiplication Radix-32 and Radix-256 / P.-M. Seidel ; L. D. McFearin ; D. W. Matula

Analysis of Column Compression Multipliers / K'A. C. Bickerstaff ; E. E. Swartzlander, Jr. ; M. J. Schulte

Faithful Powering Computation Using Table Look-Up and a Fused Accumulation Tree / J. A. Pineiro ; J. D. Bruguera

Cryptography / Session 3：

Bit-Parallel Systolic Modular Multipliers for a Class of GF(2[superscript m]) / C.-Y. Lee ; E.-H. Lu ; J.-Y. Lee

Modular Multiplication and Base Extensions in Residue Number Systems / J.-C. Bajard ; L.-S. Didier ; P. Kornerup

Efficient Computation of Multiplicative Inverses for Cryptographic Applications / M. A. Hasan

Optimised Squaring of Long Integers Using Precomputed Partial Products / B. Phillips

Division and Square Root / Session 4：

Correctly Rounded Reciprocal Square-Root by Digit Recurrence and Radix-4 Implementation / E. Antelo

A Hardware Algorithm for Computing Reciprocal Square Root / N. Takagi

Improved Table Lookup Algorithms for Postscaled Division

Elementary Functions and Rounding / Session 5：

Worst Cases for Correct Rounding of the Elementary Functions in Double Precision / V. Lefevre

Generation and Analysis of Hard to Round Cases for Binary Floating Point Division

Some Improvements on Multipartite Table Methods / F. de Dinechin ; A. Tisserand

High-Performance Architectures for Elementary Function Generation / J. Cao ; B. W. Y. Wei ; J. Cheng

Number Systems / Session 6：

A Decimal Floating-Point Specification / M. F. Cowlishaw ; E. M. Schwarz ; R. M. Smith ; C. F. Webb

Algorithms for Quad-Double Precision Floating Point Arithmetic / Y. Hida ; X. S. Li ; D. H. Bailey

Effective Continued Fractions / D. Lester

Floating Point Units / Session 7：

1-GHz HAL SPARC64 Dual Floating Point Unit with RAS Features / A. Naini ; A. Dhablania ; W. James ; D. Das Sarma

On the Design of Fast IEEE Floating-Point Adders / G. Even

In-Order Issue Out-of-Order Execution Floating-Point Coprocessor for CalmRISC32 / C.-H. Jeong ; W.-C. Park ; T.-D. Han ; S.-W. Kim ; M.-K. Lee

Addition / Session 8：

Using the Reverse-Carry Approach for Double-Datapath Floating-Point Addition

High Speed Parallel-Prefix Modulo 2[superscript n]+1 Adders for Diminished-One Operands / H. T. Vergos ; C. Efstathiou ; D. Nikolos

Parallel Prefix Adder Design / A. Beaumont-Smith ; C.-C. Lim

Logarithmic Number Systems / Session 9：

Low-Power Properties of the Logarithmic Number System / V. Paliouras ; T. Stouraitis

Unrestricted Faithful Rounding is Good Enough for Some LNS Applications / M. G. Arnold ; C. Walter

The Use of the Multi-Dimensional Logarithmic Number System in DSP Applications / V. S. Dimitrov ; J. Eskritt ; L. Imbert ; G. A. Jullien ; W. C. Miller

On-Line Arithmetic / Session 10：

On-Line Arithmetic for Detection in Digital Communication Receivers / S. Rajagopal ; J. R. Cavallaro

A Design of Radix-2 On-Line Division Using LSA Organization / A. F. Tenca ; S. U. Hussaini

Addendum: Reprinted Paper from the 14th Computer Arithmetic Symposium: A Family of Adders / S. Knowles

Author Index

Foreword

Committees

Additional Reviewers

Keynote Speech

Computer Arithmetic--A Processor Architect's Perspective / Ruby B. Lee

Binary Strings in Computer Arithmetic / Session 1：

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