Message from the Symposium Chair |
Message from the Program Committee |
Symposium Committee |
Referees |
Invited Address / Session 1: |
Fuzzy Logic as a Basis for a Theory of Hierarchical Definability (THD) / L. Zadeh |
Logic Design I / Session 2A: |
Implementation of Multiple-Valued Functions Using Literal-Splitting Technique / E. Dubrova |
Hyperoperations on {0, 1, 2} Based on Min, Max, and Universal Literal Operations / N. Takagi ; K. Nakashima |
An Extension of Ternary Majority Function and Its Application to Evolvable System / Y. Yamamoto |
A New Construction of the Irreducible Polynomial for Parallel Multiplier over GF(2[superscript m]) / J.-H. Hwang ; K.-J. Moon ; S.-Y. Park ; H.-S. Kim |
Functional Expressions / Session 2B: |
New Information on the Effectiveness of Different Reed-Muller Algebras on the Representation of Quaternary Functions / K. Adams ; J. McGregor |
Polynomial Expansions over GF(3) Based on Fastest Transformation / B. Falkowski ; C. Fu |
The Generation Circulation Method to Generalized Reed-Muller Coefficients over GF(3) / C. Lee ; G.-Y. Byun ; B.-S. Shin ; J.-H. Sim |
Optimization of GF(4) Expressions Using the Extended Dual Polarity Property / D. Jankovic ; R. Stankovic ; C. Moraga |
Fuzzy Logic / Session 3A: |
Normal Forms for Fuzzy Logic Functions / I. Perfilieva |
Towards Fuzzy Type Theory / V. Novak |
Universes of Fuzzy Sets--A Short Survey / S. Gottwald |
Fixed Points for Fuzzy Rule Bases and Fuzzy Chaining Syllogism / K. Soleimani ; M. Mashinchi ; H. Maleki |
Automated Finding of the Willis Ring in MR Angiography Images Using Fuzzy Knowledge Base / S. Kobashi ; K. Kondo ; Y. Hata |
LSI Design / Session 3B: |
Counter Tree Diagrams for Design and Analysis of Fast Addition Algorithms / J. Sakiyama ; T. Aoki ; T. Higuchi |
Bidirectional Data Transfer Based Asynchronous VLSI System Using Multiple-Valued Current Mode Logic / T. Hanyu ; T. Takahashi ; M. Kameyama |
MVL Circuit Design and Characterization at the Transistor Level Using SUS-LOC / E. Kinvi-Boh ; M. Aline ; O. Sentieys ; E. Olson |
A Technique for Logic Design of Voltage-Mode Pass Transistor Based Multi-valued Multiple-Output Logic Circuits / H. Babu ; Md. R. Islam ; A. Ali ; Md. M. Akon ; Md. A. Rahaman ; Md. F. Islam |
Recursive Evaluation of the Generalized Reed-Muller Coefficients / G. Na ; S. Kim ; J. Choi ; H. Kim |
Logic Design II / Session 4A: |
Cascade Realizations of Two-Valued Input Multiple-Valued Output Functions Using Decomposition of Group Functions / T. Sasao |
A Novel Technology Mapping Method for AND/XOR Expressions / S.-B. Ko ; J.-C. Lo |
Iterative Symmetry Indices Decomposition for Ternary Logic Synthesis in Three-Dimensional Space / A. Al-Rabadi |
Multi-output Galois Field Sum of Products Synthesis with New Quantum Cascades / M. Khan ; M. Perkowski ; P. Kerntopf |
Relationship between UCHT and FFT / S. Xie ; S. Rahardja ; Z. Gu |
Logics and Algebras / Session 4B: |
Several Remarks on Non-Boolean Functions over Boolean Algebras / D. Simovici |
Complete and Independent Sets of Axioms of Boolean Algebra / T. Ninomiya ; M. Mukaidono |
Characterization of the Axiomatizable Prenex Fragments of First-Order Godel Logics / M. Baaz ; N. Preining ; R. Zach |
New Logical and Complexity Results for Signed-SAT / C. Ansotegui ; F. Manya |
From Intuitionistic Logic to Godel-Dummett Logic via Parallel Dialogue Games / C. Fermuller ; A. Ciabattoni |
Biomorphic Analog Devices Based on Reaction-Diffusion Systems / T. Asai ; Y. AmemiyaSession 5: |
LSI Circuits / Session 6A: |
Multiple-Valued Dynamic Source-Coupled Logic / A. Mochizuki |
A Field-Programmable Digital Filter Chip Using Multiple-Valued Current-Mode Logic / K. Degawa |
A Study on the Design of Flash Analog to Quaternary Converter Using DLC Comparator / S. Han ; Y. Choi ; H. Seong |
A Novel Multiple-Input Multiple-Valued Semi-floating-gate Latch / O. Mirmotahari ; Y. Berg |
Decision Diagrams I / Session 6B: |
On the Size of Multiple-Valued Decision Diagrams / D. Miller ; G. Dueck |
Efficient Minimization of Multiple-Valued Decision Diagrams for Incompletely Specified Functions / D. Popel ; R. Drechsler |
Compact Representations of Logic Functions Using Heterogeneous MDDs / S. Nagayama |
Complexity of Decision Trees for Boolean Functions / R. Freivalds ; M. Miyakawa ; I. Rosenberg |
Nano Technology / Session 7A: |
Experimental and Simulation Studies of Single-Electron-Transistor-Based Multiple-Valued Logic / H. Inokawa ; Y. Takahashi |
Complementary Self-Biased Scheme for the Robust Design of CMOS/SET Hybrid Multi-valued Logic / K.-W. Song ; S. Lee ; D. Kim ; K. Kim ; J. Kyung ; G. Baek ; C.-A. Lee ; J. Lee ; B.-G. Park |
Proposal of Four-Valued MRAM Based on MTJ/RTD Structure / T. Uemura ; M. Yamamoto |
Modeling and Simulation / Session 7B: |
Modeling Multi-valued Circuits in SystemC / D. Grosse ; G. Fey |
Dynamic Reliability Indices for Multi-state System / E. Zaitseva |
CTL Model-Checking over Logics with Non-classical Negations / M. Chechik ; W. MacCaull |
Clone Theory / Session 8A: |
On the Centralizers of Monoids in Clone Theory / H. Machida |
Generation of the Post Lattice by Irreducible Clones / G. Pogosyan |
On Intervals of Partial Clones of Boolean Partial Functions / L. Haddad ; G. Simons |
Spectral Techniques / Session 8B: |
Family of Fast Transforms over GF(3) Logic |
Spectral Transforms of Mixed-Radix MVL Functions / M. Thornton |
Fast Algorithm for Computing Spectral Transforms of Boolean and Multiple-Valued Functions on Circuit Representation / R. Krenz ; A. Kuehlmann |
Functions of Multiple-Valued Logic and the Complexity of Constraint Satisfaction: A Short Survey / A. Krokhin ; A. Bulatov ; P. JeavonsSession 9: |
Applications / Session 10A: |
Learning Subjective Probabilities from a Small Data Set / C. Huang |
Using Games for Benchmarking and Representing the Complete Solution Space Using Symbolic Techniques / S. Kinder |
From Continuous to Multiple-Valued Data |
Decision Diagrams II / Session 10B: |
Augmented Sifting of Multiple-Valued Decision Diagrams |
On the Average Path Length in Decision Diagrams of Multiple-Valued Functions / J. Butler |
Generalized Complex Spectral Decision Diagrams Using Unified Complex Hadamard Transform |
Author Index |
Message from the Symposium Chair |
Message from the Program Committee |
Symposium Committee |
Referees |
Invited Address / Session 1: |
Fuzzy Logic as a Basis for a Theory of Hierarchical Definability (THD) / L. Zadeh |