Proceedings : 16th Symposium on Integrated Circuits and Systems Design : SBCCI 2003 : São Paulo, Brazil, September 8-11, 2003

>> Google Books

所蔵情報QRコード

Proceedings : 16th Symposium on Integrated Circuits and Systems Design : SBCCI 2003 : São Paulo, Brazil, September 8-11, 2003 / edited by Reinaldo A. Bergamaschi, Wilhelmus Van Noije, and Wolfgang Rosenstiel

資料種別:

図書

出版情報:

Los Alamitos, Calif. : IEEE Computer Society, c2003

形態:

xvi, 362 p. ; 28 cm

著者名:

ISBN:

9780769520094 [076952009X]

書誌ID:

BA73228171

子書誌情報

フルテキスト

所蔵情報

他の版・巻

書誌詳細

その他の標題:

SBCCI2003

注記:

Includes bibliographical references and index
"IEEE Computer Society order number PRO [i.e. 0] 2009"--T.p. verso

主題:

Integrated circuits--Design and construction--Congresses

言語:

英語

目次情報:

Foreword

Organizing Committee

Program Committee

Reviewers

Contributing Organizations

Corporate Sponsors

Tutorials

SystemC: From Language to Applications, from Tools to Methodologies / Grant Martin

System-Level Design for FPGAs / Patrick Lysaght

High-Performance RF/Microwave Integrated Circuits in Advanced Logic CMOS Technology: The Coming of Age for RF/Digital Mixed-Signal System-on-a-Package / Luiz Franca-Neto

Advanced Amplifier Design / Session 1A：

Design of a Low Noise Amplifier for CDMA Transceivers at 900 MHz in CMOS 0.35 [mu]m / J. A. P. Azevedo ; T. C. Pimenta

A Methodology for CMOS Low Noise Amplifier Design / E. Roa ; J. N. Soares ; W. Van Noije

Design of a Reusable Rail-to-Rail Operational Amplifier / P. Aguirre ; F. Silveira

Design of Operational Transconductance Amplifiers with Improved Gain by Using Graded-Channel SOI nMOSFETs / S. P. Gimenez ; M. A. Pavanello ; J. A. Martino ; S. Adriaensen ; D. Flandre

Logic Synthesis Techniques / Session 1B：

Boolean Technology Mapping Based on Logic Decomposition / M. Damiani ; A. Y. Selchenko

Retiming Finite State Machines to Control Hardened Data Paths / I. Auge ; F. Donnet ; F. Petrot

Combining Retiming and Recycling to Optimize the Performance of Synchronous Circuits / L. P. Carloni ; A. L. Sangiovanni-Vincentelli

Simplification of Toffoli Networks via Templates / D. Maslov ; G. W. Dueck ; D. M. Miller

Invited Paper / Session 2：

SystemC and the Future of Design Languages: Opportunities for Users and Research / G. Martin

Digital Design Techniques / Session 3A：

A New Pipelined Array Architecture for Signed Multiplication / E. Costa ; S. Bampi ; J. Monteiro

Novel Design Methodology for High-Performance XOR-XNOR Circuit Design / S. Goel ; M. A. Elgamel ; M. A. Bayoumi

High-Level and Co-Design Approaches / Session 3B：

Towards a High-Level Synthesis of Reconfigurable Bit-Serial Architectures / A. Rettberg ; F. Dittmann ; M. Zanella ; T. Lehmann

DALI: A Methodology for the Co-Design of Dataflow Applications on Hardware/Software Architectures / M. P. Vestias ; H. C. Neto

Mapping Applications onto FPGAs / Session 4A：

ME64--A Highly Scalable Hardware Parallel Architecture for Motion Estimation in FPGA / D. Zandonai ; M. Bergerman

Hyperspectral Images Clustering on Reconfigurable Hardware Using the K-Means Algorithm / A. G. da S. Filho ; A. C. Frery ; C. C. de Araujo ; H. Alic ; J. Cerqueira ; J. A. Loureiro ; M. E. de Lima ; M. das G. S. Oliveira ; M. M. Horta

Design and Prototyping of Direct Torque Control of Induction Motors in FPGAs / S. Ferreira ; F. Haffner ; L. F. Pereira ; F. Moraes

FPGA-Based Hardware Architecture for Neural Network: Binary Radix vs. Stochastic / N. Nedjah ; L. de Macedo Mourelle

IP Integration Techniques / Session 4B：

An XML Format Based Integration Infrastructure for IP Based Design / M. Visarius ; J. Lessmann ; W. Hardt ; F. Kelso ; W. Thronicke

Tangram--Virtual Integration of Heterogeneous IP Components in a Distributed Co-Simulation Environment / U. R. F. Souza ; J. K. Sperb ; B. A. de Mello ; F. R. Wagner

A Fast IP-Core Integration Methodology for SoC Design / J. A. de Oliveira Filho ; P. R. Maciel ; J. Moura ; B. Celso

A Universal High-Performance Analog Interface for Signal Processing SOCs / E. E. Fabris ; L. Carro

Architecture and Implementation of Multi-Processor SoCs for Advanced Set-Top Box and Digital TV Systems / S. DuttaSession 5：

Asynchronous Design Techniques / Session 6A：

Automatic Generation of 1-of-M QDI Asynchronous Adders / J. Fragoso ; G. Sicard ; M. Renaudin

Exclusion Relation of k Out of n and the Synthesis of Speed-Independent Circuits / A. Pereira ; A. R. Borges ; A. Ferrari

Networks-on-Chip / Session 6B：

Algorithms and Tools for Network on Chip Based System Design / T. Lei ; S. Kumar

SoCIN: A Parametric and Scalable Network-on-Chip / C. A. Zeferino ; A. A. Susin

Application Specific RF and Analog Design / Session 7A：

A Low Ripple Fully Integrated Charge Pump Regulator / J. Soldera ; A. Vilas Boas ; A. Olmos

A Temperature Compensated Fully Trimmable On-Chip IC Oscillator

Bias Dependence of Noise Correlation in MAGFETs / F. C. Castaldo ; J. P. C. Cajueiro ; C. A. dos Reis

A Charge Correction Cell for FGMOS-Based Circuits / E. O. Rodriguez-Villegas ; A. Yufera ; A. Rueda

Applications of Formal Methods to Design / Session 7B：

Unified Theory to Build Cell-Level Transistor Networks from BDDs / R. E. B. Poli ; F. R. Schneider ; R. P. Ribas ; A. I. Reis

Modeling a Reconfigurable System for Computing the FFT in Place via Rewriting-Logic / M. Ayala-Rincon ; R. B. Nogueira ; C. H. Llanos ; R. P. Jacobi ; R. W. Hartenstein

Runtime Analysis of Synchronous Programs for Low-Level Real-Time Verification / G. Logothetis ; K. Schneider ; C. Metzler

A Consumer Report on BDD Packages / G. Janssen

Novel Architectures / Session 8A：

A New Hybrid Parallel/Reconfigurable Architecture: The X4CP32 / A. Azevedo ; R. Soares ; I. S. Silva

Control Development for Mechatronic Systems with a Fully Reconfigurable Pipeline Architecture / U. Dierkes ; C. Rustemeier

Efficient Processor Instruction Set Extension by Asynchronous Reconfigurable Datapath Integration / J. Becker ; A. Thomas ; M. Scheer

Situated Learning on FPGA for Superscalar Microprocessor Design Education / R. Takahashi ; H. Ohiwa

Noise Analysis and Layout / Session 8B：

On-Chip Decoupling Capacitor Optimization for Noise and Leakage Reduction / H. H. Chen ; J. S. Neely ; M. F. Wang ; G. Co

Minimum-Area Shield Insertion for Explicit Inductive Noise Reduction

A New Continuous Switching Window Computation with Crosstalk Noise / J. M. Wang ; P. Chen ; O. Hafiz

Improving Simulated Annealing Placement by Applying Random and Greedy Mixed Perturbations / R. F. Hentschke ; R. A. da L. Reis

Future Design Tools for Platform FPGAs / P. LysaghtSession 9：

Issues in Reconfigurable Architectures / Session 10A：

Power Estimation and Power Measurement of Xilinx Virtex FPGAs: Trade-Offs and Limitations / M. Huebner ; M. Ullmann

Dynamic Reconfiguration Behavior Using Generic FPGAs and FPIDs / R. L. Zuim ; C. J. N. Coelho, Jr. ; L. F. E. Moreira ; A. O. Fernandes ; J. M. da Mata ; D. C. da Silva, Jr.

Timing Analysis and Layout / Session 10B：

Improving Critical Path Identification in Functional Timing Analysis / D. Ferrao ; G. Wilke ; R. Reis ; J. L. Guntzel

A Transistor Sizing Method Applied to an Automatic Layout Generation Tool / C. Santos ; C. Lazzari

Innovative Approaches to RF and Analog Design Problems / Session 11A：

Analog IC Modules Design Using Trapezoidal Association of MOS Transistors in 0.35 [mu]m Technology / A. Girardi ; F. P. Cortes ; E. Fabris

Digital Background Calibration Technique for Pipeline ADCs with Multi-Bit Stages / A. J. Gines ; E. J. Peralias

Design Methodologies for High-Speed CMOS Photoreceiver Front-Ends / F. Tissafi-Drissi ; I. O'Connor ; F. Mieyeville ; F. Gaffiot

Testing RF Signal Paths Using Spectral Analysis and Subsampling / M. Negreiros ; E. Schuler

High-Level Validation and Modeling / Session 11B：

Accurate Dependability Analysis of CAN-Based Networked Systems / J. Perez ; M. S. Reorda ; M. Violante

ReCoNet: Modeling and Implemention of Fault-Tolerant Distributed Reconfigurable Hardware / C. Haubelt ; D. Koch ; J. Teich

CACO-PS: A General-Purpose Cycle-Accurate Configurable Power Simulator / A. C. S. Beck Filho ; J. C. B. Mattos

From VHDL Register Transfer Level to SystemC Transaction Level Modeling: A Comparative Case Study / N. Calazans ; E. Moreno ; F. Hessel ; V. Rosa ; E. Carara

Author Index

Foreword

Organizing Committee

Program Committee

Reviewers

Contributing Organizations

Corporate Sponsors

続きを見る

東工大ブックレビュー

類似資料:

1 図書 SBCCI2007 : 20th Symposium on Integrated Circuits and Systems Design : Rio de Janeiro, Brazil, September 3 to 6, 2007 : chip in Rio : proceedings Symposium on Integrated Circuits and Systems Design, Sociedade Brasileira de Computação, ACM Special Interest Group on … Association for Computing Machinery	7 電子ブック Integrated Circuits and Systems Design (SBCCI), 2014 27th Symposium on IEEE Electronic Library (IEL) Conference Proceedings, IEEE
2 図書 SBCCI 2006 : 19th Symposium on Integrated Circuits and Systems Design : Ouro Preto, Minas Gerais, Brazil : August 28-September 1, 2006 : chip on the mountains : … Symposium on Integrated Circuits and Systems Design, Sociedade Brasileira de Computação Association for Computing Machinery	8 電子ブック Integrated Circuits and Systems Design (SBCCI), 2013 26th Symposium on IEEE Electronic Library (IEL) Conference Proceedings, IEEE
3 図書 2003 Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems : digest of papers : [9-11 April, 2003, Grainau, Germany] Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems, Ponchak, George E., IEEE Microwave Theory and … IEEE	9 電子ジャーナル Integrated Circuits and Systems Design (SBCCI), Symposium on IEEE Electronic Library (IEL) Conference Series, IEEE
4 電子ブック Proceedings of the 11th Brazilian Symposium on Integrated circuit design Association for Computing Machinery-Digital Library.; ACM Special Interest Group on Design Automation., Association for … ACM Digital Library Proceedings, IEEE	10 図書 1996 IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design : proceedings, University of Pavia, Pavia, Italy, 13-14 September 1996 IEEE-CAS Region 8 Workshop on Analog and Mixed IC Design, Maloberti, F. (Franco), Baschirotto, A. (Andrea), Liberali, V. … Institute of Electrical and Electronics Engineers
5 電子ブック Proceedings of the 11th Brazilian Symposium on Integrated circuit design Association for Computing Machinery-Digital Library.; ACM Special Interest Group on Design Automation., Association for … IEEE Electronic Library (IEL) Conference Proceedings, IEEE	11 図書 Proceedings : 18th International Conference on VLSI Design : held jointly with the 4th International Conference on Embedded Systems Design : 3-7 January, 2005, … International Conference on VLSI Design, IEEE Circuits and Systems Society, VLSI Society of India, International … IEEE Computer Society
6 電子ブック 2012 25th Symposium on Integrated Circuits and Systems Design (SBCCI) IEEE Electronic Library (IEL) Conference Proceedings, IEEE	12 電子ブック Proceedings of the 4th international conference on Hardware/software codesign and system synthesis Bergamaschi, Reinaldo, Association for Computing Machinery-Digital Library. ACM Digital Library Proceedings, ACM