Preface |
Introduction / 1: |
Semiconductor Technology and RF Power Amplifier Design / 1.1: |
Device Modeling / 1.2: |
Power Amplifier IC Design / 1.3: |
Power Amplifier Linearity / 1.4: |
Modulation Schemes / 1.5: |
Circuit Simulation / 1.6: |
Load-Pull Measurements / 1.7: |
References |
Device Modeling for CAD / 2: |
Bipolar Junction and Heterojunction Bipolar Transistors / 2.1: |
Bipolar Device Models / 2.3: |
The Ebers-Moll Model / 2.3.1: |
The Gummel-Poon Model / 2.3.2: |
The VBIC Model / 2.3.3: |
MEXTRAM / 2.3.4: |
HICUM / 2.3.5: |
MOSFET Device Physics / 2.4: |
MOSFET Device Models / 2.5: |
The Level 1 Model / 2.5.1: |
The Level 2 and Level 3 Models / 2.5.2: |
BSIM / 2.5.3: |
The BSIM2 and HSPICE Level 28 Models / 2.5.4: |
BSIM3 / 2.5.5: |
MOS Model 9 and MOS Model 11 / 2.5.6: |
BSIM4 / 2.5.7: |
Empirical Modeling of Bipolar Devices / 3: |
Modeling the HBT versus the BJT / 3.1: |
Parameter Extraction / 3.1.2: |
Motivation for an Empirical Bipolar Device Model / 3.1.3: |
Physics-Based and Empirical Models / 3.1.4: |
Compatibility between Large- and Small-Signal Models / 3.1.5: |
Model Construction and Parameter Extraction / 3.2: |
Current Source Model / 3.2.1: |
Current Source Model Parameter Extraction / 3.2.2: |
Extraction of Intrinsic Capacitances / 3.2.3: |
Extraction of Base Resistance / 3.2.4: |
Parameter Extraction Procedure / 3.2.5: |
Temperature-Dependent InGaP/GaAs HBT Large-Signal Model / 3.3: |
Empirical Si BJT Large-Signal Model / 3.4: |
Extension of the Empirical Modeling Method to the SiGe HBT / 3.5: |
Summary / 3.6: |
Scalable Modeling of RF Mosfets / 4: |
NQS Effects / 4.1: |
Distributed Gate Resistance / 4.1.2: |
Distributed Substrate Resistance / 4.1.3: |
Scalable Modified BSIM3v3 Model / 4.2: |
Scalability of MOSFET Model / 4.2.1: |
Extraction of Small-Signal Model Parameters / 4.2.2: |
Scalable Substrate Network Modeling / 4.2.3: |
Modified BSIM3v3 Model / 4.2.4: |
Power Amplifier Design Methodology / 4.3: |
Classes of Operation / 5.3: |
Performance Metrics / 5.4: |
Thermal Instability and Ballasting / 5.5: |
Power Amplifier Design in Silicon / 6: |
A 2.4-GHz High-Efficiency SiGe HBT Power Amplifier / 6.1: |
Circuit Design Considerations / 6.2.1: |
Analysis of Ballasting for SiGe HBT Power Amplifiers / 6.2.2: |
Harmonic Suppression Filter and Output Match Network / 6.2.3: |
Performance of the Power Amplifier Module / 6.2.4: |
RF Power Amplifier Design Using Device Periphery Adjustment / 6.3: |
Analysis of the Device Periphery Adjustment Technique / 6.3.1: |
1.9-GHz CMOS Power Amplifier / 6.3.2: |
1.9-GHz CDMA/PCS SiGe HBT Power Amplifier / 6.3.3: |
Nonlinear Term Cancellation for Linearity Improvement / 6.3.4: |
Efficiency Enhancement of RF Power Amplifiers / 7: |
Efficiency Enhancement Techniques / 7.1: |
Envelope Elimination and Restoration / 7.2.1: |
Bias Adaptation / 7.2.2: |
The Doherty Amplifier Technique / 7.2.3: |
Chireix's Outphasing Amplifier Technique / 7.2.4: |
The Classical Doherty Amplifier / 7.3: |
The Multistage Doherty Amplifier / 7.4: |
Principle of Operation / 7.4.1: |
Analysis of Efficiency / 7.4.2: |
Practical Considerations / 7.4.3: |
Measurement Results / 7.4.4: |
Index |
Preface |
Introduction / 1: |
Semiconductor Technology and RF Power Amplifier Design / 1.1: |
Device Modeling / 1.2: |
Power Amplifier IC Design / 1.3: |
Power Amplifier Linearity / 1.4: |