| Keynote |
| HyVM - Hybrid Virtual Machines - Efficient Use of Future Heterogeneous Chip Multiprocessors / Karsten Schwan ; Ada Gavrilovska ; Sudha Yalamanchili |
| Processor Design |
| How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT / Jörg Mische ; Irakli Guliashvili ; Sascha Uhrig ; Theo Ungerer |
| Complexity-Effective Rename Table Design for Rapid Speculation Recovery / Görkem Asilioglu ; Emine Merve Kaya ; Oguz Ergin |
| An Embedded GC Module with Support for Multiple Mutators and Weak References / Thomas B. Preu<$$$>er ; Peter Reichel ; Rainer G. Spallek |
| Embedded Systems |
| A Hierarchical Distributed Control for Power and Performances Optimization of Embedded Systems / Patrick Bellasi ; William Fornaciari ; David Siorpaes |
| Autonomic Workload Management for Multi-core Processor Systems / Johannes Zeppenfeld ; Andreas Herkersdorf |
| Firefly Flashing Synchronization as Inspiration for Self-synchronization of Walking Robot Gait Patterns Using a Decentralized Robot Control Architecture / Bojan Jakimovski ; Benjamin Meyer ; Erik Maehle |
| Organic Computing and Self-organization |
| The JoSchKa System: Organic Job Distribution in Heterogeneous and Unreliable Environments / Matthias Bonn ; Hartmut Schmeck |
| On Deadlocks and Fairness in Self-organizing Resource-Flow Systems / Jan-Philipp Steghöfer ; Pratik Mandrekar ; Florian Nafz ; Hella Seebach ; Wolfgang Reif |
| Ad-Hoc Information Spread between Mobile Devices: A Case Study in Analytical Modeling of Controlled Self-organization in IT Systems / Kamil Kloch ; Jan W. Kantelhardt ; Paul Lukowicz ; Patrick Wüchner ; Hermann de Meer |
| Processor Design and Transactional Memory |
| MLP-Aware Instruction Queue Resizing: The Key to Power-Efficient Performance / Pavlos Petoumenos ; Georgia Psychou ; Stefanos Kaxiras ; Juan Manuel Cebrian Gonzalez ; Juan Luis Aragon |
| Exploiting Inactive Rename Slots for Detecting Soft Errors / Mehmet Kayaalp ; Osman S. Ünsal ; Mateo Valero |
| Efficient Transaction Nesting in Hardware Transactional Memory / Yi Liu ; Yangming Su ; Cui Zhang ; Mingyu Wu ; Xin Zhang ; He Li ; Depei Qian |
| Energy Management in Distributed Environments and Ad-Hoc Grids |
| Decentralized Energy-Management to Control Smart-Home Architectures / Birger Becker ; Florian Allerding ; Ulrich Reiner ; Mattias Kahl ; Urban Richter ; Daniel Pathmaperuma ; Thomas Leibfried |
| EnergySaving Cluster Roll: Power Saving System for Clusters / Manuel F. Dolz ; Juan C. Fernández ; Rafael Mayo ; Enrique S. Quintana-Ortí |
| Effect of the Degree of Neighborhood on Resource Discovery in Ad Hoc Grids / Tariq Abdullah ; Koen Bertels ; Luc Onana Alima ; Zubair Nawaz |
| Performance Modelling and Benchmarking |
| Compiler-Directed Performance Model Construction for Parallel Programs / Martin Schindewolf ; David Kramer ; Marcelo Cintra |
| A Method for Accurate High-Level Performance Evaluation of MPSoC Architectures Using Fine-Grained Generated Traces / Roman Plyaskin |
| JetBench: An Open Source Real-Time Multiprocessor Benchmark / Muhammad Yasir Qadri ; Dorian Matichard ; Klaus D. McDonald Maier |
| Accelerators and GPUs |
| A Tightly Coupled Accelerator Infrastructure for Exact Arithmetics / Fabian Nowak ; Rainer Buchty |
| Optimizing Stencil Application on Multi-thread GPU Architecture Using Stream Programming Model / Fang Xudong ; Tang Yuhua ; Wang Guibin ; Tang Tao ; Zhang Ying |
| Author Index |
| Keynote |
| HyVM - Hybrid Virtual Machines - Efficient Use of Future Heterogeneous Chip Multiprocessors / Karsten Schwan ; Ada Gavrilovska ; Sudha Yalamanchili |
| Processor Design |
| How to Enhance a Superscalar Processor to Provide Hard Real-Time Capable In-Order SMT / Jörg Mische ; Irakli Guliashvili ; Sascha Uhrig ; Theo Ungerer |
| Complexity-Effective Rename Table Design for Rapid Speculation Recovery / Görkem Asilioglu ; Emine Merve Kaya ; Oguz Ergin |
| An Embedded GC Module with Support for Multiple Mutators and Weak References / Thomas B. Preu<$$$>er ; Peter Reichel ; Rainer G. Spallek |
