| Applications |
| Implementation of Realtime and Highspeed Phase Detector on FPGA / Andre Guntoro ; Peter Zipf ; Oliver Soffke ; Harald Klingbeil ; Martin Kumm ; Manfred Gleaner |
| Case Study: Implementation of a Virtual Instrument on a Dynamically Reconfigurable Platform / Gerd Van den Branden ; Geert Braeckman ; Abdellah Touhafi ; Erik Dirkx |
| Configurable Embedded Core for Controlling Electro-Mechanical Systems / Rodrigo Piedade ; Leonel Sousa |
| Evaluation of a Locomotion Algorithm for Worm-Like Robots on FPGA-Embedded Processors / J. Gonzalez-Gomez ; I. Gonzalez ; F. Gomez-Arribas ; E. Boemo |
| Dynamic Partial Reconfigurable FIR Filter Design / Yeong-Jae Oh ; Hanho Lee ; Chong-Ho Lee |
| Event-Driven Simulation Engine for Spiking Neural Networks on a Chip / Rodrigo Agis ; Javier Diaz ; Eduardo Ros ; Richard Carrillo ; Eva. M. Ortigosa |
| Towards an Optimal Implementation of MLP in FPGA / E.M. Ortigosa ; A. Canas ; R. Rodriguez ; J. Diaz ; S. Mota |
| Power |
| Energy Consumption for Transport of Control Information on a Segmented Software-Controlled Communication Architecture / Kris Heyrman ; Antonis Papanikolaou ; Francky Catthoor ; Peter Veelaert ; Koen Debosschere ; Wilfried Philips |
| Quality Driven Dynamic Low Power Reconfiguration of Handhelds / Hiren Joshi ; S.S. Verma ; G.K. Sharma |
| An Efficient Estimation Method of Dynamic Power Dissipation on VLSI Interconnects / Joong-ho Park ; Bang-Hyun Sung ; Seok-Yoon Kim |
| Image Processing |
| Highly Paralellized Architecture for Image Motion Estimation / Sonia Mota ; Rafael Rodriguez-Gomez |
| Design Exploration of a Video Pre-processor for an FPGA Based SoC / Niklas Lepisto ; Benny Thornberg ; Mattias O'Nils |
| QUKU: A Fast Run Time Reconfigurable Platform for Image Edge Detection / Sunil Shukla ; Neil W. Bergmann ; Jurgen Becker |
| Applications of Small-Scale Reconfigurability to Graphics Processors / Kevin Dale ; Jeremy W. Sheaffer ; Vinu Vijay Kumar ; David P. Luebke ; Greg Humphreys ; Kevin Skadron |
| An Embedded Multi-camera System for Simultaneous Localization and Mapping / Vanderlei Bonato ; Jose A. de Holanda ; Eduardo Marques |
| Performance/Cost Trade-Off Evaluation for the DCT Implementation on the Dynamically Reconfigurable Processor / Vu Manh Tuan ; Yohei Hasegawa ; Naohiro Katsura ; Hideharu Amano |
| Trigonometric Computing Embedded in a Dynamically Reconfigurable Cordic System-on-Chip / Francisco Fons ; Mariano Fons ; Enrique Canto ; Mariano Lopez |
| Handel-C Design Enhancement for FPGA-Based DV Decoder / Slawomir Cichon ; Marek Gorgon ; Miroslaw Pac |
| Run-Time Resources Management on Coarse Grained, Packet-Switching Reconfigurable Architecture: A Case Study Through the Apaches' Platform / Alex Ngouanga ; Gilles Sassatelli ; Lionel Torres ; Thierry Gil ; Andre Borin Suarez ; Altamiro Amadeu Susin |
| A New VLSI Architecture of Lifting-Based DWT / Young-Ho Seo ; Dong- Wook Kim |
| Architecture Based on FPGA's for Real-Time Image Processing / Ignacio Bravo ; Pedro Jimenez ; Manuel Mazo ; Jose Luis Lazaro ; Ernesto Martin |
| Real Time Image Processing on a Portable Aid Device for Low Vision Patients / E. Ros ; F. Vargas-Martin ; M.D. Pelaez-Coca |
| General Purpose Real-Time Image Segmentation System / F. de Toro |
| Organization and Architecture |
| Implementation of LPM Address Generators on FPGAs / Hui Qin ; Tsutomu Sasao ; Jon T. Butler |
| Self Reconfiguring EPIC Soft Core Processors / Rainer Scholz ; Klaus Buchenrieder |
| Constant Complexity Management of 2D HW Multitasking in Run-Time Reconfigurable FPGAs / S. Roman ; J. Septien ; H. Mecha ; D. Mozos |
| Area/Performance Improvement of NoC Architectures / Mario P. Vestias ; Horacio C. Neto |
| Implementation of Inner Product Architecture for Increased Flexibility in Bitwidths of Input Array / Kwangsup So ; Jinsang Kim ; Won-Kyung Cho ; Young-Soo Kim ; Doug Young Suh |
| A Flexible Multi-port Caching Scheme for Reconfigurable Platforms / Su-Shin Ang ; George Constantinides ; Peter Cheung ; Wayne Luk |
| Enhancing a Reconfigurable Instruction Set Processor with Partial Predication and Virtual Opcode Support / Nikolaos Vassiliadis ; George Theodoridis ; Spiridon Nikolaidis |
| A Reconfigurable Data Cache for Adaptive Processors / D. Benitez ; J.C. Moure ; D.I. Rexachs ; E. Luque |
| The Emergence of Non-von Neumann Processors / Daniel S. Poznanovic |
| Scheduling Reconfiguration Activities of Run-Time Reconfigurable RTOS Using an Aperiodic Task Server / Marcelo Gotz ; Florian Dittmann |
| A New Approach to Assess Defragmentation Strategies in Dynamically Reconfigurable FPGAs / Manuel G. Gericota ; Gustavo R. Alves ; Luis F. Lemos ; Jose M. Ferreira |
| A 1,632 Gate-Count Zero-Overhead Dynamic Optically Reconfigurable Gate Array VLSI / Minoru Watanabe ; Fuminori Kobayashi |
| PISC: Polymorphic Instruction Set Computers / Stamatis Vassiliadis ; Georgi Kuzmanov ; Stephan Wong ; Elena Moscu-Panainte ; Georgi Gaydadjiev ; Koen Bertels ; Dmitry Cheresiz |
| Networks and Communication |
| Generic Network Interfaces for Plug and Play NoC Based Architecture / Sanjay Pratap Singh ; Shilpa Bhoj ; Dheera Balasubramanian ; Tanvi Nagda ; Dinesh Bhatia ; Poras Balsara |
| Providing QoS Guarantees in a NoC by Virtual Channel Reservation / Nikolay Kavaldjiev ; Gerard J.M. Smit ; Pascal T. Wolkotte ; Pierre G. Jansen |
| Efficient Floating-Point Implementation of High-Order (N)LMS Adaptive Filters in FPGA / Milan Tichy ; Jan Schier ; David Gregg |
| A Reconfigurable Architecture for MIMO Square Root Decoder / Hongzhi Wang ; Pierre Leray ; Jacques Palicot |
| Security |
| Time-Memory Trade-Off Attack on FPGA Platforms: UNIX Password Cracking / Nele Mentens ; Lejla Batina ; Bart Preneel ; Ingrid Verbauwhede |
| Updates on the Security of FPGAs Against Power Analysis Attacks / F.-X. Standaert ; F. Mace ; E. Peeters ; J.-J. Quisquater |
| Reconfigurable Modular Arithmetic Logic Unit for High-Performance Public-Key Cryptosystems / K. Sakiyama ; N. Mentens ; L. Batina ; B. Preneel ; I. Verbauwhede |
| FPGA Implementation of a GF(2m) Tate Pairing Architecture / Maurice Keller ; Tim Kerins ; Francis Crowe ; William Marnane |
| Iterative Modular Division over GF(2m): Novel Algorithm and Implementations on FPGA / Guerric Meurice de Dormale ; Jean-Jacques Quisquater |
| Mobile Fingerprint Identification Using a Hardware Accelerated Biometric Service Provider / David Rodriguez ; Juan M. Sanchez ; Arturo Duran |
| Unite: Uniform Hardware-Based Network Intrusion deTection Engine / S. Yusuf ; W. Luk ; M.K.N. Szeto ; W. Osborne |
| Tools |
| Impact of Loop Unrolling on Area, Throughput and Clock Frequency in ROCCC: C to VHDL Compiler for FPGAs / Betul Buyukkurt ; Zhi Guo ; Walid A. Najjar |
| Automatic Compilation Framework for Bloom Filter Based Intrusion Detection / Dinesh C. Suresh |
| A Basic Data Routing Model for a Coarse-Grain Reconfigurable Hardware / Jie Guo ; Gleb Belov ; Gerhard P. Fettweis |
| Hardware and a Tool Chain for ADRES / Bjorn De Sutter ; Bingfeng Mei ; Andrei Bartic ; Tom Vander Aa ; Mladen Berekovic ; Jean-Yves Mignolet ; Kris Croes ; Paul Coene ; Miro Cupac ; Aissa Couvreur ; Andy Folens ; Steven Dupont ; Bert Van Thielen ; Andreas Kanstein ; Hong-Seok Kim ; Suk Jin Kim |
| Integrating Custom Instruction Specifications into C Development Processes / Jack Whitham ; Neil Audsley |
| A Compiler-Oriented Architecture Description for Reconfigurable Systems / Jens Braunes ; Rainer G. Spallek |
| Dynamic Instruction Merging and a Reconfigurable Array: Dataflow Execution with Software Compatibility / Antonio Carlos S. Beck ; Victor F. Gomes ; Luigi Carro |
| High-Level Synthesis Using Spark and Systolic Array / Jae-Jin Lee ; Gi-Yong Song |
| Super Semi-systolic Array-Based Application-Specific PLD Architecture |
| Author Index |
| Applications |
| Implementation of Realtime and Highspeed Phase Detector on FPGA / Andre Guntoro ; Peter Zipf ; Oliver Soffke ; Harald Klingbeil ; Martin Kumm ; Manfred Gleaner |
| Case Study: Implementation of a Virtual Instrument on a Dynamically Reconfigurable Platform / Gerd Van den Branden ; Geert Braeckman ; Abdellah Touhafi ; Erik Dirkx |
| Configurable Embedded Core for Controlling Electro-Mechanical Systems / Rodrigo Piedade ; Leonel Sousa |
| Evaluation of a Locomotion Algorithm for Worm-Like Robots on FPGA-Embedded Processors / J. Gonzalez-Gomez ; I. Gonzalez ; F. Gomez-Arribas ; E. Boemo |
| Dynamic Partial Reconfigurable FIR Filter Design / Yeong-Jae Oh ; Hanho Lee ; Chong-Ho Lee |
