Preface |
Conference organization |
Ultra-Shallow Junctions for Nanoscale CMOS / Section I: |
High Ramp Rate Rapid Thermal Annealing for Ultra-Shallow Junctions / P. Kohli ; H.-J. Li ; S. Ganguly ; T. Kirichenko ; B. Murto ; E. Graetz ; P. Zeitzoff ; M. Pawlik ; P.B. Merrill ; S. Banerjee1.: |
New Physics for Modeling Transient Enhanced Diffusion in RTP / M.Y.L. Jung ; R. Gunawan ; R.D. Braatz ; E.G. Seebauer2.: |
Optical Effects in Diffusion and Activation Processes During RTA / R.B. Fair3.: |
Spike Annealing for Ultra-Shallow Junction Formation / A. Jain4.: |
Inherent Radiative Differences between Rapid Thermal and Furnace Annealing: Their Effects on Dopant Diffusion and Activation / P.S.-J. Choi ; D.-L. Kwong5.: |
Ultra-Shallow Junction Formation Using Ion Implantation and Rapid Thermal Annealing: Physical and Practical Limits / A. Agarwal ; H.-J.L. Gossmann ; A.T. Fiory ; V.C. Venezia ; D.C. Jacobson6.: |
Role of Silicon and Boron Interstitial Clusters in Transient Enhanced Diffusion / N.E.B. Cowern ; G. Mannino ; F. Roozeboom ; J.G.M. van Berkum ; B. Colombeau ; A. Claverie7.: |
Ultra-Shallow P[superscript +]-N Junctions for 35-70 nm CMOS using Selectively Deposited Very Heavily Boron-doped Silicon-Germanium Films / S. Gannavaram ; M.C. Ozturk8.: |
Selective Epitaxial Si and SiGe for Elevated Source Drain MOSFETs / S.B. Samavedam ; A. Dip ; A.M. Phillips ; J. Smith ; J.M. Grant ; W.J. Taylor ; P.J. Tobin9.: |
Laser Thermal Processing (LTP) for Fabrication of Ultra-Shallow, Hyper-Abrupt, Highly Activated Junctions for Deca-Nanometer MOS Transistors / S. Talwar ; Y. Wang ; C. Gelatos10.: |
Athermal Annealing of Silicon Implanted with Phosphorus and Arsenic / J. Grun ; R.P. Fischer ; M. Peckerar ; C.L. Felix ; B.C. Covington ; D.W. Donnelly ; B. Boro Djordjevic ; R. Mignogna ; J.R. Meyer ; A. Ting ; C.K. Manka11.: |
Exploring Alternative Annealing Methods for Shallow Junction Formation in Ion Implanted Silicon / K.S. Jones ; H. Banisaukis ; S. Earles ; C. Lindfors ; M. Griglione ; M.E. Law ; S.W. Falk ; D.F. Downey12.: |
Shallow Junction Challenges to Rapid Thermal Processing / L. Larson13.: |
Contacts for Nanoscale CMOS / Section II: |
Aspects of Enhanced Titanium Salicide Formation / L. Kappius ; R.T. Tung14.: |
Multi-Substrate CoSi[subscript 2] Formation Kinetics in a Low-Pressure, Susceptor-Based RTP Tool / A.J. Atanos ; V. Parihar ; S.-P. Sun15.: |
Metal / Silicon Schottky Barrier Lowering by RTCVD Interface Passivation / Q.W. Ren ; W.D. van Noort ; L.K. Nanver ; J.W. Slotboom16.: |
Gate Stacks for Nanoscale CMOS / Section III: |
Ultrathin CVD Gate Dielectrics for 130 nm Technology Node / V.H.C. Watt ; A. Karamcheti ; T.-Y. Luo ; H.N. Al-Shareef ; M.D. Jackson ; H.R. Huff17.: |
High Performance, Highly Reliable Gate Oxide Formed with Rapid Thermal Oxidation In-Situ Steam Generation (ISSG) Technique / Y. Ma ; Y.N. Chen ; M.M. Brown ; F. Li ; Y. Chen ; J. Eng, Jr. ; R.L. Opila ; Y.J. Chabal ; J. Sapjeta ; D.A. Muller ; G.C. Xing ; T. Trowbridge ; M. Khau ; N. Tam18.: |
High Reliable In Situ Steam Generation Process for 1.5-2.5 nm Gate Oxides / M. Bidaud ; F. Guyader ; F. Glowacki ; F. Monsieur ; D. Roy ; S. Bruyere ; E. Vincent ; K. Barla19.: |
Investigation of In-Situ Steam Generated Oxide (ISSG) followed by Remote Plasma Nitridation (RPN) for Effective Oxide Thickness Decrease and Gate Leakage Reduction / K. Eason ; R. Jallepally ; D. Noble ; S. Mattangady ; R. Khamankar ; A.L.P. Rotondaro20.: |
Rapid Thermal Processing Using Steam / R. Sharangpani ; J.H. Das ; S.-P. Tay21.: |
Corona-Charge Evaluation of Thermal SiO[subscript 2] Growth by Single-Wafer and Batch Methods / A. Fiory ; J. Zhang ; P. Frisella ; J. Hebb22.: |
Growth of Ultrathin Nitride on Si(100) by Rapid Thermal N[subscript 2] Treatment / Z.H. Lu ; A. Khoueir ; W. T. Ng23.: |
Gate Dielectrics Formed by Remote Plasma Nitridation of Ultrathin In-Situ Steam Generated (ISSG) Oxides / T.Y. Luo ; G.A. Brown ; M. Laughery ; K. Torres ; K. Ahmed ; R. Jallepally|cD. Noble ; G. Miner24.: |
In-situ Rapid Thermal N[subscript 2]O Oxidation of NH[subscript 3]-Nitrided Si for Ultrathin Nitride/Oxide Stack Gate Formation / Y.H. Kim ; S.C. Song ; H.F. Luan ; J.C. Gelpey ; A. Kepton ; S. Levy ; R. Bloom25.: |
Processing and Characterization of RTCVD Silicon Nitride and Oxynitride Grown in a Single-Wafer RT Cluster Tool / C.P. D'Emic ; E.P. Gusev ; J. Newbury ; P. Kozlowski ; K. Chan ; T. Zabel ; P. Varekamp26.: |
Integrated Rapid Thermal CVD Oxynitride Gate Dielectric for Advanced CMOS Technology / H.-H. Tseng27.: |
Ultrathin (EOT [ 7 A) Ta[subscript 2]O[subscript 5] Gate Stacks Prepared by an In-Situ RT-MOCVD Process / S.J. Lee ; C.H. Lee ; Y. Senzaki ; D. Roberts28.: |
High-k Oxides by Atomic Layer Chemical Vapour Deposition / M. Tuominen ; T. Kanniainen ; S. Haukka29.: |
Electrical and Chemical Properties of Ultrathin RT-MOCVD Grown Ti-Doped Ta[subscript 2]O[subscript 5] / A. Mao ; T.S. Jeon ; R. Vrtis30.: |
Electrical and Material Properties of Metal Silicate Dielectrics and Metal Gates for Advanced CMOS Devices / V. Misra ; M. Kulkarni ; G. Heuss ; H. Zhong ; H. Lazar31.: |
RTCVD Polysilicon Grain Dimension Control / D. O'Meara ; J. Conner ; M. Rossow ; T. Neil ; V. Wang ; C.-L. Chang32.: |
New Applications of RTP / Section IV: |
Mechanisms and Applications of the Control of Dopant Profiles in Silicon Using Si[subscript 1-x-y] Ge[subscript x]C[subscript y] Layers Grown by RTCVD / J.C. Sturm ; M.S. Carroll ; M. Yang ; J. Gray ; E. Stewart33.: |
High Performance Buried Silicon-Germanium Channel PMOST Fabricated Using Rapid Thermal Processing and Shallow Trench Isolation / D.J. Tweet ; S.T. Hsu ; D.R. Evans ; B. Ulrich ; Y. Ono ; L. Stecker34.: |
Kinetic Study of In-Situ Copper Oxidation and Reduction Using Rapid Thermal Processing and Its Applications in ULSI / Y.Z. Hu35.: |
Development of an RTA Process for the Enhanced Crystallization of Amorphous Silicon Thin Films / Y.-G. Yoon ; T.-K. Kim ; K.-B. Kim ; J.-Y. Choi ; B.-I. Lee ; S.-K. Joo36.: |
Advances in RTP Systems and Process Monitoring / Section V: |
Optimization of Support Temperature in RTA-Tools by Scanning Infrared Depolarization Imaging of Monitor Wafers / H.-D. Geiler ; H. Karge ; B. Krimbacher37.: |
Wafer Temperature Characterization During Low-Temperature Annealing / W.S. Yoo ; T. Fukada38.: |
Determining the Uncertainty of Wafer Temperature Measurements Induced by Variations in the Optical Properties of Common Semiconductor Materials / B. Adams ; A. Hunter ; M. Yam ; B. Peuse39.: |
Low-Temperature Measurements and Monitors for Rapid Thermal Processing / P.J. Timans ; N. Acharya ; I. Amarilio40.: |
In Situ Selectivity and Thickness Monitoring based on Quadrupole Mass Spectroscopy during Selective Silicon Epitaxy / E.A. Rying ; G.L. Bilbro ; J.C. Lu41.: |
Optimization and Control of Gas Flows in an RTCVD Reactor / Y. Rainova ; K. Antonenko ; A. Barchotkin ; J. Pezoldt42.: |
LEVITOR 4000: An Advanced RTP System Based on Conductive Heat Transfer / V.I. Kuznetsov ; A.B. Storm ; G.J. Snijders ; C. de Ridder ; T.A.M. Ruijl ; J.C.G. van der Sanden ; E.H.A. Granneman43.: |
Ultra-Shallow Junction Formation of BF[subscript 2 superscript +] Implants Using a Low-Pressure, Hot-Wall Rapid Thermal Anneal / K. Reddy ; J.-F. Daviet44.: |
Temperature Gradient Rapid Thermal Processor / J.-M. Dilhac ; C. Ganibal45.: |
Spike Thermal Processing Using Arc-Lamps / D.M. Camm ; M.E. Lefrancois46.: |
Novel High Ramp-Down Rate and Reflector Design in Rapid Thermal Processing / M.H. Lee ; C.W. Liu47.: |
Improved Performance of a Fast-Ramp RTA System through Recipe and Controller Optimization / S. Ramamurthy ; A. Mayur ; D. de Roover ; J.L. Ebert48.: |
Author Index and Key Word Index / Section VI: |
Author Index |
Key Word Index |
Preface |
Conference organization |
Ultra-Shallow Junctions for Nanoscale CMOS / Section I: |