close
1.

図書

図書
edited by Mathew A. Diethelm ... [et al.] ; sponsored by IEEE Computer Society, IEEE Computer Society Technical Committee on the Internet, IEEE Communications Society,
出版情報: Piscataway, N.J. : IEEE Service Center, c2002  x, 434 p. ; 28 cm
所蔵情報: loading…
2.

図書

図書
sponsored by IEEE Computer Society Technical Committee on Multiple-Valued Logic, University of Massachusetts, Boston
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2002  xi, 289 p. ; 28 cm
所蔵情報: loading…
目次情報: 続きを見る
Message from the General Chair
Message from the Program Committee
Reviewers
Invited Talk
Equations in the Algebra of Logic / S. Rudeanu
Algebra I
Some Results on the Centralizers of Monoids in Clone Theory / H. Machida ; I. Rosenberg ; M. Miyakawa
Partial Hyperclones on a Finite Set / B. Romov
On the Structures of Weak Interlaced Bilattice / M. Kondo
Logical Design I
Improving the Characterization of p-Valued Threshold Functions / C. Moraga
A Conjunctive Canonical Expansion of Multiple-Valued Functions / E. Dubrova ; P. Farm
Sierpinski Gaskets for Logic Functions Representation / D. Popel ; A. Dani
Logic for Static Hazard Detection of Multiple-Valued Logic Circuits with Tsum, Min, and Literals / N. Takagi ; K. Nakashima
Circuits I
Multiple-Valued Data Recovery Techniques for Band-Limited Channels in VLSI / Y. Yuminaka ; T. Morishita ; T. Aoki ; T. Higuchi
An Impact of Introducing Multi-Level Signals to a Bandpass Cascaded Delta-Sigma Modulator / T. Waho ; S. Kobayashi ; K. Matsuura
Voltage Comparator Circuits for Multiple-Valued CMOS Logic / Y. Guo ; K. Current
Logical Design II
Efficient Calculation of Fixed-Polarity Polynomial Expressions for Multiple-Valued Logic Functions / D. Jankovic ; R. Stankovic ; R. Drechsler
Comparison of Different Features of Quaternary Reed-Muller Canonical Forms and Some New Statistical Results / K. Adams ; J. McGregor
Design and Implementation of Error Detection and Correction Circuitry for Multilevel Memory Protection / B. Polianskikh ; Z. Zilic
Parallel Evolutionary Graph Synthesis on a PC Cluster and Its Application to Multiple-Valued Circuit Synthesis / M. Natsui
Consequence and Complexity in Infinite-Valued Logic: A Survey / V. Marra ; D. Mundici
Spectral Techniques
Some Remarks on Linear Transform of Variables in Representation of Adders by Word-Level Expressions and Spectral Transform Decision Diagrams / J. Astola
Chrestenson Spectrum Computation Using Cayley Color Graphs / M. Thornton ; D. Miller ; W. Townsend
The Role of Super-Fast Transforms in Speeding Up Quantum Computations / K. Radecka
Multiple-Valued and Spectral Approach to Lossless Compression of Binary, Gray Scale and Color Biomedical Images / B. Falkowski ; B. Olejnicka
Circuits II
Design of Dynamic Reliability Indices / E. Zaitseva ; V. Levashenko
PODEM Based on Static Testability Measures and Dynamic Testability Measures for Multiple-Valued Logic Circuits / N. Kamiura ; T. Isokawa ; N. Matsui
Design of Ternary Schmitt Triggers Based on Its Sequential Characteristics / X. Wu ; P. Wang ; Y. Xia
Multiple-Valued Logic-in-Memory VLSI Based on Ferroelectric Capacitor Storage and Charge Addition / H. Kimura ; T. Hanyu ; M. Kameyama
Optimization of Multi-Valued Multi-Level Networks / M. Gao ; J. Jiang ; Y. Jiang ; Y. Li ; A. Mishchenko ; S. Sinha ; T. Villa ; R. Brayton
Algebra II
de Morgan Bisemilattice of Fuzzy Truth Value / H. Kikuchi
Independence of Each Axiom in a Set of Axioms and Complete Sets of Axioms of Boolean Algebra / T. Ninomiya ; M. Mukaidono
On Functions Defined on Free Boolean Algebras / D. Simovici ; S. Jaroszewicz
Logical Design III
The Word-Level Models for Efficient Computation of Multiple-Valued Functions. Part 1: LAR Based Model / S. Yanushkevich ; P. Dziurzanski ; V. Shmerko
The Word-Level Models for Efficient Computation of Multiple-Valued Functions. Part 2: LWL Based Model / A. Tomaszewska
Efficient Bridging Fault Simulation of Sequential Circuits Based on Multi-Valued Logics / I. Polian ; P. Engelke ; B. Becker
Multiple-Valued-Digit Number Representations in Arithmetic Circuit Algorithms
Decision Diagrams
Variable Selection Heuristics and Optimum Decision Trees--An Experimental Study / N. Otsu
On the Construction of Multiple-Valued Decision Diagrams
Evaluation of Static Variable Ordering Heuristics for MDD Construction
Representations of Logic Functions Using QRMDDs / S. Nagayama ; T. Sasao ; Y. Iguchi ; M. Matsuura
Circuits III
Fully Source-Coupled Logic Based Multiple-Valued VLSI / T. Ike
A Current-Mode Folding/Interpolating CMOS Analog to Quaternary Converter Using Binary to Quaternary Encoding Block / S. Han ; S. Park ; H. Seong ; H. Kim
Multi-Valued Flip-Flop with Neuron-CMOS NMIN Circuits / M. Inaba ; K. Tanno ; O. Ishizuka
Author Index
Message from the General Chair
Message from the Program Committee
Reviewers
3.

図書

図書
sponsored by IEEE Computer Society
出版情報: Piscataway, N.J. : IEEE Service Center, c2002  xi, 259 p. ; 28 cm
所蔵情報: loading…
目次情報: 続きを見る
Preface
Conference Organizers
Program Committee
Additional Acknowledgements
Keynotes
Software Project Prediction
An Empirical Validation of the Relationship between the Magnitude of Relative Error and Project Size / E. Stensrud ; T. Foss ; B. Kitchenham ; I. Myrtveit
On the Sensitivity of the COCOMO II Software Cost Estimation Model / P. Musilek ; W. Pedrycz ; N. Sun ; G. Succi
Estimating Software Project Effort by Analogy Based on Linguistic Values / A. Idri ; A. Abran ; T. M. Khoshgoftaar
Measurement for Object-Oriented Systems
Dynamic Coupling Measures for Object-Oriented Software / E. Arisholm
Architectural Tradeoffs at the Object Level / W.M. Evanco
Testability Analysis of a UML Class Diagram / B. Baudry ; Y. Le Traon ; G. Sunye
Maintenance and Evolution
Gemini: Maintenance Support Environment Based on Code Clone Analysis / Y. Ueda ; T. Kamiya ; S. Kusumoto ; K. Inoue
Avoiding Architectural Degeneration: An Evaluation Process for Software Architecture / M. Lindvall ; R. Tesoriero ; P. Costa
Software Quality Analysis Code Clones in Industrial Legacy Software / A. Monden ; D. Nakae ; S-I. Sato ; K-I. Matsumoto
Software Inspections
An Industrial Case Study to Examine a Non-Traditional Inspection Implementation for Requirements Specifications / O. Laitenberger ; T. Beil ; T. Schwinn
Investigating the Influence of Inspector Capability Factors with Four Inspection Techniques on Inspection Performance / S. Biffl ; M. Halling
Software Inspection Benchmarking--A Qualitative and Quantitative Comparative Opportunity / C. Wohlin ; A. Aurum ; H. Petersson ; F. Shull ; M. Ciolkowski
Web and Network Technology
A Comparison of Development Effort Estimation Techniques for Web Hypermedia Applications / E. Mendes ; I. Watson ; C. Triggs ; N. Mosley ; S. Counsell
A Generic Model and Tool Support for Assessing and Improving Web Processes / D. Rodriguez ; R. Harrison ; M. Satpathy
A Metric to Predict Software Scalability / E.J. Weyuker ; A. Avritzer
Models and Abstractions
An Empirical Study of the Impact of Count Models Predictions on Module-Order Models / T.M. Khoshgoftaar ; E. Geleyn ; K. Gao
Entropy-Metric for Systems with COTS Software / N. Chapin
Measuring Graph Abstractions of Software: An Information-Theory Approach / E.B. Allen
Fault Prediction
Program Risk Definition via Linear Programming Techniques / M. Pighin ; V. Podgorelec ; P. Kokol
Tree-Based Software Quality Estimation Models for Fault Prediction / N. Seliya
Methodological Issues
Experience from Replicating Empirical Studies on Prediction Models / M.C. Ohlsson ; P. Runeson
A New Approach to Factorization--Introducing Metrics / M. Dao ; M. Huchard ; T. Libourel ; C. Roume ; H. Leblanc
How Valuable is Company-Specific Data Compared to Multi-Company Data for Software Cost Estimation? / I. Wieczorek ; M. Ruhe
Workshop
What We Have Learned About Fighting Defects / V. Basili ; B. Boehm ; A. Winsor Brown ; D. Port ; I. Rus ; M. Zelkowitz
Author Index
Preface
Conference Organizers
Program Committee
4.

図書

図書
sponsored by IEEE Computer Society
出版情報: Los Alamitos, Calif. ; Tokyo : IEEE Computer Society, c2002  xxiii, 1185 p. ; 28 cm
所蔵情報: loading…
5.

図書

図書
[sponsored by the IEEE Computer Society Test Technology Technical Council, the IEEE Computer Society Technical Committee on Fault-Tolerant Computing]
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2002  xiii, 441 p. ; 23 cm
所蔵情報: loading…
目次情報: 続きを見る
Message from the Symposium Chairs
Organizing Committee
Program Committee
Yield I / Session 1:
Manufacturability Analysis of Analog CMOS ICs Through Examination of Multiple Layout Solutions / P. Khademsameni ; M. Syrzycki
Effect of Static Power Dissipation in Burn-In Environment on Yield of VLSI / A. Vassighi ; O. Semenov ; M. Sachdev ; A. Keshavarzi
Yield Estimates for the TESH Multicomputer Network / B. M. Maziarz ; V. K. Jain
Crosstalk Faults / Session 2:
A Simplified Gate-Level Fault Model for Crosstalk Effects Analysis / P. Civera ; L. Macchiarulo ; M. Violante
A Test-Vector Generation Methodology for Crosstalk Noise Faults / H. Hashempour ; Y.-B. Kim ; N. Park
Self-Checking and ABFT / Session 3:
A Parity Code Based Fault Detection for an Implementation of the Advanced Encryption Standard / G. Bertoni ; L. Breveglieri ; I. Koren ; P. Maistri ; V. Piuri
Designing Self-Checking FPGAs Through Error Detection Codes / C. Bolchini ; F. Salice ; D. Sciuto
Self-Checking 1-out-of-n CMOS Current-Mode Checker / J. Mathew ; E. Dubrova
Partially Duplicated Code-Disjoint Carry-Skip Adder / D. Marienfeld ; V. Ocheretnij ; M. Gossel ; E. S. Sogomonyan
Input Ordering in Concurrent Checkers to Reduce Power Consumption / K. Mohanram ; N. A. Touba
Fault Simulation and Injection I / Session 4:
New Methods for Evaluating the Impact of Single Event Transients in VDSM ICs / D. Alexandrescu ; L. Anghel ; M. Nicolaidis
Injecting Bit Flip Faults by Means of a Purely Software Approach: A Case Studied / R. Velazco ; A. Corominas ; P. Ferreyra
Gate-Delay Fault Diagnosis Using the Inject-and-Evaluate Paradigm / H.-B. Wang ; S.-Y. Huang ; J.-R. Huang
Scan Design / Session 5:
Scan Architecture for Shift and Capture Cycle Power Reduction / P. M. Rosinger ; B. M. Al-Hashimi ; N. Nicolici
Inserting Test Points to Control Peak Power During Scan Testing / R. Sankaralingam
Adaptable Voltage Scan Testing of Charge-Sharing Faults for Domino Circuits / C.-H. Cheng
Test Application / Session 6:
Matrix-Based Test Vector Decompression Using an Embedded Processor / K. J. Balakrishnan
Data Compression for System-on-Chip Testing Using ATE / F. Karimi ; W. Meleis ; Z. Navabi ; F. Lombardi
Test Generation / Session 7:
Fortuitous Detection and Its Impact on Test Set Sizes Using Stuck-At and Transition Faults / J. Dworak ; J. Wingfield ; B. Cobb ; S. Lee ; L.-C. Wang ; M. R. Mercer
Test Time Reduction in a Manufacturing Environment by Combining BIST and ATE / F. J. Meyer
Testing Digital Circuits with Constraints / A. A. Al-Yamani ; S. Mitra ; E. J. McCluskey
Concurrent Error Detection / Session 8:
On-Line Testing of Transient Faults Affecting Functional Blocks of FCMOS, Domino and FPGA-Implemented Self-Checking Circuits / C. Metra ; S. Di Francescantonio ; G. Marrale
Self-Checking and Fault Tolerance Quality Assessment Using Fault Sampling / F. M. Goncalves ; M. B. Santos ; I. C. Teixeira ; J. P. Teixeira
A Memory Overhead Evaluation of the Interleaved Signature Instruction Stream / F. Rodriguez ; J. C. Campelo ; J. J. Serrano
Fault-Tolerant CAM Architectures: A Design Framework / M. G. Sami ; R. Stefanelli
Fault Simulation and Injection II / Session 9:
Using Run-Time Reconfiguration for Fault Injection in Hardware Prototypes / L. Antoni ; R. Leveugle ; B. Feher
A Fault Hypothesis Study on the TTP/C Using VHDL-Based and Pin-Level Fault Injection Techniques / S. Blanc ; J. Gracia ; P. J. Gil
Fault List Compaction Through Static Timing Analysis for Efficient Fault Injection Experiments / M. Sonza Reorda
Interconnect / Session 10:
Performance of Deadlock-Free Adaptive Routing for Hierarchical Interconnection Network TESH / S. Horiguchi ; Y. Miura
Modeling of FPGA Local/Global Interconnect Resources and Derivation of Minimal Test Configurations / X. Sun ; A. Alimohammad ; P. Trouborst
Testing Layered Interconnection Networks
Yield II / Session 11:
Repair Yield Simulation with Iterative Critical Area Analysis for Different Types of Failure / Y. Hamamura ; K. Nemoto ; T. Kumazawa ; H. Iwata ; K. Okuyama ; S. Kamohara ; A. Sugimoto
Yield Modeling of a WSI Telcom Router Architecture / B. Qiu ; Y. Savaria ; M. Lu ; C. Wang ; C. Thibeault
System-on-Chip Test / Session 12:
Fast and Energy-Frugal Deterministic Test Through Test Vector Correlation Exploitation / O. Sinanoglu ; A. Orailoglu
Adaptive Test Scheduling in SoC's by Dynamic Partitioning / D. Zhao ; S. Upadhyaya
Feasibility of CED / Session 13:
Duplication-Based Concurrent Error Detection in Asynchronous Circuits: Shortcomings and Remedies / T. Verdel ; Y. Makris
Feasibility Study of Designing TSC Sequential Circuits with 100% Fault Coverage / S. J. Piestrak
Test / Session 14:
Emulation-Based Design Errors Identification / A. CasteInuovo ; A. Fin ; F. Fummi ; F. Sforza
A New Functional Fault Model for FPGA Application-Oriented Testing / M. Rebaudengo
Neighbor Current Ratio (NCR): A New Metric for I[subscript DDQ] Data Analysis / S. S. Sabade ; D. M. H. Walker
CMOS Standard Cells Characterization for I[subscript DDQ] Testing / W. A. Pleskacz ; T. Borejko ; W. Kuzmicz
On-Chip Jitter Measurement for Phase Locked Loops / T. Xia ; J.-C. Lo
Neural Networks-Based Parametric Testing of Analog IC / V. Stopjakova ; D. Micusik ; L. Benuskova ; M. Margala
Reliable and Repairable Memories / Session 15:
Balanced Redundancy Utilization in Embedded Memory Cores for Dependable Systems / M. Choi ; Y. B. Kim
Repairability Evaluation of Embedded Multiple Region DRAMs / Y. Chang
Author Index
TTTC Information
Message from the Symposium Chairs
Organizing Committee
Program Committee
6.

図書

図書
sponsored by IEEE Computer Society Technical Committee on Security and Privacy
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2002  viii, 331 p. ; 28 cm
所蔵情報: loading…
目次情報: 続きを見る
Preface
Workshop Committee
Information Flow I
Approximate Non-Interference / A. Di Pierro ; C. Hankin ; H. Wiklicky
Quantifying Information Flow / G. Lowe
Secrecy in Multiagent Systems / J. Halpern ; K. O'Neill
Intrusion
Two Formal Analyses of Attack Graphs / S. Jha ; O. Sheyner ; J. Wing
Formal Specification of Intrusion Signatures and Detection Rules / J.-P. Pouzol ; M. Ducasse
Protocols I
Types and Effects for Asymmetric Cryptographic Protocols / A. D. Gordon ; A. Jeffrey
Security Protocol Design via Authentication Tests / J. D. Guttman
Strand Spaces and Rank Functions: More Than Distant Cousins / J. Heather
Applications of Model-Checking
Probabilistic Analysis of Anonymity / V. Shmatikov
Analysis of SPKI/SDSI Certificates Using Model Checking / T. Reps
Protocols II
Capturing Parallel Attacks within the Data Independence Framework / P. J. Broadfoot ; A. W. Roscoe
Polynomial Fairness and Liveness / M. Backes ; B. Pfitzmann ; M. Steiner ; M. Waidner
A Formal Analysis of Some Properties of Kerberos 5 Using MSR / F. Butler ; I. Cervesato ; A. D. Jaggard ; A. Scedrov
Games
A Formal Analysis of Syverson's Rational Exchange Protocol / L. Buttyan ; J.-P. Hubaux ; S. Capkun
Game Analysis of Abuse-Free Contract Signing / S. Kremer ; J.-F. Raskin
Language-Based Security
Fine-Grained Information Flow Analysis for a [lambda]-Calculus with Sum Types / V. Simonet
Cryptographic Types / D. Duggan
Secure Information Flow and Pointer Confinement in a Java-Like Language / A. Banerjee ; D. A. Naumann
Distributed Rights, Access Control, and Watermarking
A Privacy Policy Model for Enterprises / G. Karjoth ; M. Schunter
A Logic for Reasoning about Digital Rights / R. Pucella ; V. Weissman
Hiding Functions and Computational Security of Image Watermarking Systems / N. Tran
Information Flow II
Information Flow Security in Dynamic Contexts / R. Focardi ; S. Rossi
A Simple View of Type-Secure Information Flow in the [pi]-Calculus / F. Pottier
Author Index
Preface
Workshop Committee
Information Flow I
7.

図書

図書
sponsored by IEEE Computer Society, IEEE CS Virtual Intelligence Task Force ; in cooperation with The Information Technology Research Institute, Wright State University, AIIS Inc
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2001  xiv, 375 p. ; 28 cm
所蔵情報: loading…
目次情報: 続きを見る
Message from the General Chair
Message from the Program Chair
Committees
Conference Schedule
Multi-Agents and Distributed AI / Session 1:
Towards Ontological Reconciliation for Agents / L. Sterling ; K. Lister
Transaction Oriented Computational Models for Multi-Agent Systems / K. Ramamohanarao ; J. Bailey ; P. Busetta
Resource Coordination in Single Agent and Multiagent Systems / G. Edwin ; M. T. Cox
Smart Cars as Autonomous Intelligent Agents / N. Bourbakis ; M. Findler
Interleaved Backtracking in Distributed Constraint Networks / Y. Hamadi
A Multi-Agent System to the Common Management of a Renewable Resource: Application to Water Sharing / M. Le Bars ; J. M. Attonaty
Using Software Agents to Avoid Collisions Among Multiple Robots / M. Jager
Reasoning / Session 2:
RaBeCa: A Hybrid Case-Based Reasoning Development Environment / R. B. Sovat ; S. M. Aluisio ; A. C. P. L. F. de Carvalho
Automatic Knowledge Acquisition from Subject Matter Experts / M. Boicu ; G. Tecuci ; B. Stanescu ; D. Marcu ; C. Cascaval
Inconsistent Requirements: An Argumentation View / L. Perrussel ; P.-J. Charrel
Perfect Sequences for Belief Networks Representation / R. Jirousek ; J. Vejnarova
A Decentralized Model-Based Diagnostic Tool for Complex Systems / Y. Pencole ; M.-O. Cordier ; L. Roze
Alma/Carne: Implementation of a Time-Situated Meta-Reasoner / K. Purang
Towards a General Theory for Qualitative Space / B. A. El-Geresy ; A. I. Abdelmonty
Genetic Algorithms / Session 3:
Dynamic Load-Balancing via a Genetic Algorithm / W. A. Greene
Parallel Genetic Programming for Decision Tree Induction / G. Folino ; C. Pizzuti ; G. Spezzano
New Hybrid Genetic Algorithms for the Frequency Assignment Problem / M. Alabau ; L. Idoumghar ; R. Schott
Planning / Session 4:
Fast Suboptimal Planning with Nexus States / W. Briggs ; B. Dawson
An Architecture for Planning in Uncertain Domains / M. E. Agueda ; P. H. Ibarguengoytia
A Metaheuristic for the Pickup and Delivery Problem with Time Windows / H. Li ; A. Lim
Machine Learning and Data Mining / Session 5:
An Effective Method for Generating Multiple Linear Regression Rules from Artificial Neural Networks / R. Setiono ; A. Azcarraga
Data Flow Coherence Criteria in ILP Tools / S. Muresan ; T. Muresan ; R. Potolea
Comparing Keyword Extraction Techniques for WEBSOM Text Archives / A. P. Azcarraga ; T. N. Yap, Jr.
Developing Collaborative Golog Agents by Reinforcement Learning / I. A. Letia ; D. Precup
Combinatorial Optimization through Statistical Instance-Based Learning / O. Telelis ; P. Stamatopoulos
Empirical Study of a Stacking State-Space / A. Ledezma ; R. Aler ; D. Borrajo
Mining First-Order Knowledge Bases for Association Rules / H. M. Jamil
Visualization Support for User-Centered Model Selection in Knowledge Discovery in Databases / T. B. Ho ; T. D. Nguyen
Generation of Propagation Rules for Intentionally Defined Constraints / S. Abdennadher ; C. Rigotti
Natural Language Processing and Information Retrieval / Session 6:
B-Course: A Web Service for Bayesian Data Analysis / P. Myllymaki ; T. Silander ; H. Tirri ; P. Uronen
An Expert Recommendation System Using Concept-Based Relevance Discernment / T. Yukawa ; K. Kasahara ; T. Kato ; T. Kita
A Robust Model for Intelligent Text Classification / R. Basili ; A. Moschitti
Corefdraw--A Tool for Annotation and Visualization of Coreference Data / S. M. Harabagiu ; R. C. Bunescu ; S. Trausan-Matu
Word Semantics for Information Retrieval: Moving One Step Closer to the Semantic Web / R. F. Mihalcea ; S. I. Mihalcea
High Precision Logic Form Transformation / V. Rus
Software Engineering / Session 7:
Loop--A Language for LP-Based AI Applications / A. Suciu ; K. Pusztai ; Z. Simon
Shamash: An AI Tool for Modeling and Optimizing Business Processes / D. Camacho ; A. Sierra-Alonso
An On-Line Repository for Embedded Software / I.-L. Yen ; L. Khan ; B. Prabhakaran ; F. B. Bastani ; J. Linn
Constraint Satisfaction / Session 8:
A New Hybrid Method for Solving Constraint Optimization Problems in Anytime Contexts / S. Loudni ; P. Boizumault
Pickup and Delivery with Time Windows: Algorithms and Test Case Generation / H. C. Lau ; Z. Liang
Successive Search Method for Valued Constraint Satisfaction and Optimization Problems / M. Tounsi ; P. David
Applications / Session 9:
Maintaining Credible Dialogs in a VideoBot System with Special Audio Techniques / D. DeGroot
Maximizing Paper Spread in Examination Timetabling Using a Vehicle Routing Method / W.-K. Ho ; W.-C. Oon
Artificial Neural Networks in Hydrological Watershed Modeling: Surface Flow Contribution from the Ungauged Parts of a Catchment / R. Chibanga ; J. Berlamont ; J. Vandewalle
Author Index
Message from the General Chair
Message from the Program Chair
Committees
8.

図書

図書
sponsored by IEEE Computer Society, IEEE Communications Society
出版情報: Piscataway, N.J. : IEEE Operations Center, c2002  3 v. ; 28 cm
所蔵情報: loading…
9.

図書

図書
edited by Rakesh Agrawal, Klaus Dittrich and Anne H.H. Ngu ; sponsored by IEEE Computer Society
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2002  xix, 735 p. ; 28 cm
所蔵情報: loading…
10.

図書

図書
sponsored by IEEE Education Society, IEEE Computer Society, American Society for Engineering Education (Educational Research and Methods Division), the University of Nevada-Reno
出版情報: Piscataway, N.J. : IEEE Operations Center, c2001  3 v. ; 28 cm
所蔵情報: loading…
文献の複写および貸借の依頼を行う
 文献複写・貸借依頼