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1.

図書

図書
sponsored by IEEE Computer Society Technical Committee on Computer Architecture, IEEE Computer Society Technical Commitee on Parallel Processing ... [et al.]
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2002  xviii, 305 p. ; 28 cm
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Message from the General Chairs
Message from the Program Chairs
Organizing Committee
Steering Committee
Program Committee
Reviewers
Keynote Address
Parallelism in Mainstream Enterprise Platforms of the Future / D. Bhandarkar
Data Parallelism and Threading / Session 1:
An Evaluation of Data-Parallel Compiler Support for Line-Sweep Applications / D. Chavarria-Miranda ; J. Mellor-Crummey
Increasing and Detecting Memory Address Congruence / S. Larsen ; E. Witchel ; S. Amarasinghe
Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread Performance / G. K. Dorai ; D. Yeung
Compiler Support for Architecture / Session 2:
Compiler-Controlled Caching in Superword Register Files for Multimedia Extension Architectures / J. Shin ; J. Chame ; M. W. Hall
Effective Compilation Support for Variable Instruction Set Architecture / J. Liu ; T. Kong ; F. Chow
A Framework for Parallelizing Load/Stores on Embedded Processors / X. Zhuang ; S. Pande ; J. S. Greenland Jr.
Program Characterization / Session 3:
Workload Design: Selecting Representative Program-Input Pairs / L. Eeckhout ; H. Vandierendonck ; K. De Bosschere
Dataflow Frequency Analysis Based on Whole Program Paths / B. Scholz ; E. Mehofer
Quantifying Instruction Criticality / E. S. Tune ; D. M. Tullsen ; B. Calder
The Role of Computational Science in Energy Efficiency and Renewable Energy / S. Hammond
Power / Session 4:
Application Transformations for Energy and Performance-Aware Device Management / T. Heath ; E. Pinheiro ; J. Hom ; U. Kremer ; R. Bianchini
Leakage Energy Management in Cache Hierarchies / L. Li ; I. Kadayif ; Y-F. Tsai ; N. Vijaykrishnan ; M. Kandemir ; M. J. Irwin ; A. Sivasubramaniam
Integrating Adaptive On-Chip Storage Structures for Reduced Dynamic Power / S. Dropsho ; A. Buyuktosunoglu ; R. Balasubramonian ; D. H. Albonesi ; S. Dwarkadas ; G. Semeraro ; G. Magklis ; M. L. Scott
Prediction / Session 5:
The Use of Prediction for Accelerating Upgrade Misses in cc-NUMA Multiprocessors / M. E. Acacio ; J. Gonzalez ; J. M. Garcia ; J. Duato
Predicting Conditional Branches with Fusion-Based Hybrid Predictors / G. H. Loh ; D. S. Henry
Memory Performance / Session 6:
Speculative Sequential Consistency with Little Custom Storage / C. Gniady ; B. Falsafi
Cost-Effective Compiler Directed Memory Prefetching and Bypassing / D. Ortega ; E. Ayguade ; J.-L. Baer ; M. Valero
Using the Compiler to Improve Cache Replacement Decisions / Z. Wang ; K. S. McKinley ; A. L. Rosenberg ; C. C. Weems
Memory Aliasing / Session 7:
Software Bubbles: Using Predication to Compensate for Aliasing in Software Pipelines / B. Goldberg ; E. Crutcher ; C. Huneycutt ; K. Palem
Speculative Alias Analysis for Executable Code / M. Fernandez ; R. Espasa
Cost Effective Memory Dependence Prediction Using Speculation Levels and Color Sets / S. Onder
The Computational Grid: Aggregating Performance and Enhanced Capability from Federated Resources / R. Wolski
Java and IA-64 / Session 8:
Just-in-Time Java Compilation for the Itanium Processor / T. Shpeisman ; G.-Y. Lueh ; A.-R. Adl-Tabatabai
Eliminating Exception Constraints of Java Programs for IA-64 / K. Ishizaki ; T. Inagaki ; H. Komatsu ; T. Nakatani
Clustered Microarchitectures / Session 9:
Optimizing Loop Performance for Clustered VLIW Architectures / Y. Qian ; S. Carr ; P. Sweany
Exploiting Pseudo-Schedules to Guide Data Dependence Graph Partitioning / A. Aleta ; J. M. Codina ; J. Sanchez ; A. Gonzalez ; D. Kaeli
Efficient Interconnects for Clustered Microarchitectures / J.-M. Parcerisa ; J. Sahuquillo
Sigarch Conference Guidelines
Author Index
Message from the General Chairs
Message from the Program Chairs
Organizing Committee
2.

図書

図書
editors, Jeffrey Arnold, Kenneth L. Pocek ; sponsored by IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2002  x, 322 p. ; 28 cm
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Conference Organizers
Applications I / Session 1:
Image Registration of Real-Time Video Data Using the SONIC Reconfigurable Computer Platform / W. J. C. Melis ; P. Y. K. Cheung ; W. Luk
A Massively Parallel RC4 Key Search Engine / K. H. Tsoi ; K. H. Lee ; P. H. W. Leong
An FPGA Implementation of Triangle Mesh Decompression / T. Mitra ; T. Chiueh
Networking I / Session 2:
Single-Chip Gigabit Mixed-Version IP Router on Virtex-II Pro / G. Brebner
Control and Configuration Software for a Reconfigurable Networking Hardware Platform / T. S. Sproull ; J. W. Lockwood ; D. E. Taylor
Tool I / Session 3:
Peer-to-Peer Hardware-Software Interfaces for Reconfigurable Fabrics / M. Budiu ; M. Mishra ; A. R. Bharambe ; S. C. Goldstein
Pam-Blox II: Design and Evaluation of C++ Module Generation for Computing with FPGAs / O. Mencer
Coarse-Grain Pipelining on Multiple FPGA Architectures / H. Ziegler ; B. So ; M. Hall ; P. C. Diniz
Template Matching / Session 4:
FPGA-Based Template Matching Using Distance Transforms / S. Hezel ; A. Kugel ; R. Manner ; D. M. Gavrila
Reconfigurable Shape-Adaptive Template Matching Architectures / J. Gause
Networking II / Session 5:
Assisting Network Intrusion Detection with Reconfigurable Hardware / B. L. Hutchings ; R. Franklin ; D. Carver
GRIP: A Reconfigurable Architecture for Host-Based Gigabit-Rate Packet Processing / P. Bellows ; J. Flidr ; T. Lehman ; B. Schott ; K. D. Underwood
Design and Analysis of a Layer Seven Network Processor Accelerator Using Reconfigurable Logic / G. Memik ; S. O. Memik ; W. H. Mangione-Smith
Architecture I / Session 6:
Using On-Chip Configurable Logic to Reduce Embedded System Software Energy / G. Stitt ; B. Grattan ; J. Villarreal ; F. Vahid
Queue Machines: Hardware Compilation in Hardware / H. Schmit ; B. Levine ; B. Ylvisaker
Applications II / Session 7:
Custom Computing Machines for the Set Covering Problem / C. Plessl ; M. Platzner
Analysis and Implementation of the Discrete Element Method Using a Dedicated Highly Parallel Architecture in Reconfigurable Computing / B. Carrion Schafer ; S. F. Quigley ; A. H. C. Chan
Using Floating-Point Arithmetic on FPGAs to Accelerate Scientific N-Body Simulations / G. Lienhart
Architecture II / Session 8:
Mobile Memory: Improving Memory Locality in Very Large Reconfigurable Fabrics / R. Yan
Hardware-Assisted Fast Routing / A. DeHon ; R. Huang ; J. Wawrzynek
Tools II / Session 9:
Optimum Wordlength Allocation / G. A. Constantinides
Precis: A Design-Time Precision Analysis Tool / M. L. Chang ; S. Hauck
Fast Area Estimation to Support Compiler Optimizations in FPGA-Based Reconfigurable Systems / D. Kulkarni ; W. A. Najjar ; R. Rinker ; F. J. Kurdahi
Image Compression / Session 10:
Hyperspectral Image Compression on Reconfigurable Platforms / T. W. Fry
MPEG-Compliant Entropy Decoding on FPGA-Augmented TriMedia/CPU64 / M. Sima ; S. Cotofana ; S. Vassiliadis ; J. T. J. van Eijndhoven ; K. Vissers
On Sparse Matrix-Vector Multiplication with FPGA-Based System / H. ElGindy ; Y.-L. ShuePoster Session 1:
Implementing a Simple Continuous Speech Recognition System on an FPGA / S. J. Melnikoff ; M. J. Russell
RACER--A Rapid Prototyping Accelerator for Pulsed Neural Networks / C. Grassmann ; J. K. Anlauf
Accelerating Radiosity Calculations Using Reconfigurable Platforms / H. Styles
On Implementing a Configware/Software SAT Solver / N. A. Reis ; J. T. de Sousa
Reconfigurable Object Detection in FLIR Image Sequences / J. E. Scalera ; C. F. Jones III ; M. Soni ; M. B. Bucciero ; P. M. Athanas ; A. L. Abbott ; A. Mishra
TCP-Stream Reassembly and State Tracking in Hardware / M. Necker ; D. Contis ; D. Schimmel
Fast and Guaranteed C Compilation onto the PACT-XPP Reconfigurable Computing Platform / J. M. P. Cardoso ; M. WeinhardtPoster Session 2:
Module Generators Driving the Compilation for Adaptive Computing Systems / A. Koch ; N. Kasprzyk
System-Level Modelling and Implementation Technique for Run-Time Reconfigurable Systems / T. Rissa ; M. Vasilko ; J. Niittylahti
Tabu Search with Intensification Strategy for Functional Partitioning in Hardware-Software Codesign / T. Wiangtong
Automatic Latency-Optimal Design of FPGA-Based Systolic Arrays / J. G. Nash
Compiling ATR Probing Codes for Execution on FPGA Hardware / W. Bohm ; R. Beveridge ; B. Draper ; C. Ross ; M. Chawathe ; W. Najjar
The Effects of Datapath Placement and C-Slow Retiming on Three Computational Benchmarks / N. Weaver
A Scalable FPGA-Based Custom Computing Machine for a Medical Image Processing / T. Yokota ; M. Nagafuchi ; Y. Mekada ; T. Yoshinaga ; K. Ootsu ; T. BabaPoster Session 3:
The Design of the Amalgam Reconfigurable Cluster / J. D. Walstrom ; J. J. Cook ; D. B. Gottlieb ; S. Ferrera ; C.-W. Wang ; N. P. Carter
Mapping Algorithms to the Amalgam Programmable-Reconfigurable Processor
Customising Floating-Point Designs / A. A. Gaffar ; N. ShiraziPoster Session 4:
Mapping Multi-Mode Circuits to LUT-Based FPGA Using Embedded MUXes / T. Courtney ; R. Turner ; R. Woods
Author Index
Conference Organizers
Applications I / Session 1:
Image Registration of Real-Time Video Data Using the SONIC Reconfigurable Computer Platform / W. J. C. Melis ; P. Y. K. Cheung ; W. Luk
3.

図書

図書
sponsored by IEEE TCCA, ACM SIGARCH
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2002  xv, 331 p. ; 28 cm
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目次情報: 続きを見る
Message from the General Chair
Message from the Program Chair
Organizing Committee
Steering Committee
Program Committee
Reviewers
Welcoming Remarks
Keynote Address / Burton J. Smith
Processor Pipelines / Session 1:
The Optimum Pipeline Depth for a Microprocessor / A. Hartstein ; T. Puzak
The Optimal Logic Depth per Pipeline Stage Is 6 to 8 FO4 Inverter Delays / M. Hrishikesh ; N. Jouppi ; K. Farkas ; D. Burger ; S. Keckler ; P. Shivakumar
Increasing Processor Performance by Implementing Deeper Pipelines / E. Sprangle ; D. Carmean
Processor Scheduling / Session 2:
Efficient Dynamic Scheduling through Tag Elimination / D. Ernst ; T. Austin
Slack: Maximizing Performance under Technological Constraints / B. Fields ; R. Bodik ; M. Hill
A Large, Fast Instruction Window for Tolerating Cache Misses / A. Lebeck ; J. Koppanalil ; T. Li ; J. Patwardhan ; E. Rotenberg
An Instruction Set and Microarchitecture for Instruction Level Distributed Processing / H.-S. Kim ; J. Smith
Safety and Reliability / Robert P. ColwellSession 3:
Transient-Fault Recovery Using Simultaneous Multithreading / T. Vijaykumar ; I. Pomeranz ; K. Cheng
Detailed Design and Evaluation of Redundant Multithreading Alternatives / S. Mukherjee ; M. Kontz ; S. Reinhardt
ReVive: Cost-Effective Architectural Support for Rollback Recovery in Shared-Memory Multiprocessors / M. Prvulovic ; Z. Zhang ; J. Torrellas
SafetyNet: Improving the Availability of Shared Memory Multiprocessors with Global Checkpoint/Recovery / D. Sorin ; M. Martin ; D. Wood
Power Aware Architecture / Session 4:
Dynamic Fine-Grain Leakage Reduction Using Leakage-Biased Bitlines / S. Heo ; K. Barr ; M. Hampton ; K. Asanovic
Drowsy Caches: Simple Techniques for Reducing Leakage Power / K. Flautner ; N. Kim ; S. Martin ; D. Blaauw ; T. Mudge
Power and Performance Evaluation of Globally Asynchronous Locally Synchronous Processors / A. Iyer ; D. Marculescu
Memory Systems / Session 5:
Using a User-Level Memory Thread for Correlation Prefetching / Y. Solihin ; J. Lee
Avoiding Initialization Misses to the Heap / J. Lewis ; B. Black ; M. Lipasti
Going the Distance for TLB Prefetching: An Application-Driven Study / G. Kandiraju ; A. Sivasubramaniam
Dynamic Optimization / Session 6:
Timekeeping in the Memory System: Predicting and Optimizing Memory Behavior / Z. Hu ; S. Kaxiras ; M. Martonosi
Implementing Optimizations at Decode Time / I. Kim
Managing Multi-configuration Hardware via Dynamic Working Set Analysis / A. Dhodapkar
Data and Storage Networks / Session 7:
Queue Pair IP: A Hybrid Architecture for System Area Networks / P. Buonadonna ; D. Culler
Experiences with VI Communication for Database Storage / Y. Zhou ; A. Bilas ; S. Jagannathan ; C. Dubnicki ; J. Philbin ; K. Li
Vector Architectures / Session 8:
Speculative Dynamic Vectorization / A. Pajuelo ; A. Gonzalez ; M. Valero
Tarantula: A Vector Extension to the Alpha Architecture / R. Espasa ; F. Ardanaz ; J. Emer ; S. Felix ; J. Gago ; R. Gramunt ; I. Hernandez ; T. Juan ; G. Lowney ; M. Mattina ; A. Seznec
Supporting Deep Speculation / Session 9:
Design Tradeoffs for the Alpha EV8 Conditional Branch Predictor / V. Krishnan ; Y. Sazeides
Difficult-Path Branch Prediction Using Subordinate Microthreads / R. Chappell ; F. Tseng ; A. Yoaz ; Y. Patt
A Scalable Instruction Queue Design Using Dependence Chains / S. Raasch ; N. Binkert
Author Index
Message from the General Chair
Message from the Program Chair
Organizing Committee
4.

図書

図書
sponsored by IEEE Computer Society Technical Committee on Computer Architecture, Association for Computing Machinery SIGARCH
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2001  xi, 291 p. ; 28 cm
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General Chair's Message
Program Chair's Message
Conference Organization
Reviewers
Plenary Session
Opening Remarks
Keynote Speech: Greg Papadopoulos, CTO, Sun Microsystems Inc., USA
Multithreading and Speculation / Session 1:
Execution-based Prediction Using Speculative Slices / C. Zilles ; G. Sohi
Speculative Precomputation: Long-range Prefetching of Delinquent Loads / J. Collins ; H. Wang ; D. Tullsen ; C. Hughes ; Y. Lee ; D. Lavery ; J. Shen
Dynamically Allocating Processor Resources between Nearby and Distant ILP / R. Balasubramonian ; S. Dwarkadas ; D. Albonesi
Memory System Issues / Session 2:
Tolerating Memory Latency through Software-Controlled Pre-Execution in Simultaneous Multithreading Processors / C. Luk
Data Prefetching by Dependence Graph Precomputation / M. Annavaram ; J. Patel ; E. Davidson
Concurrency, Latency, or System Overhead: Which Has the Largest Impact on Uniprocessor DRAM-System Performance? / V. Cuppu ; B. Jacob
Processor Architecture / Session 3:
Focusing Processor Policies via Critical-Path Prediction / B. Fields ; S. Rubin ; R. Bodik
Automated Design of Finite State Machine Predictors for Customized Processors / T. Sherwood ; B. Calder
Better Exploration of Region-Level Value Locality with Integrated Computation Reuse and Value Prediction / Y. Wu ; D. Chen ; J. Fang
Communication Support / Session 4:
CryptoManiac: A Fast Flexible Architecture for Secure Communication / L. Wu ; C. Weaver ; T. Austin
QoS Provisioning in Clusters: An Investigation of Router and NIC Design / K. Yum ; E. Kim ; C. Das
Cache Management / Session 5:
Locality vs. Criticality / S. Srinivasan ; R. Ju ; A. Lebeck ; C. Wilkerson
Dead-Block Prediction and Dead-Block Correlating Prefetchers / A. Lai ; C. Fide ; B. Falsafi
Code Layout Optimizations for Transaction Processing Workloads / A. Ramirez ; L. Barroso ; K. Gharachorloo ; R. Cohn ; J. Larriba-Pey ; P. Lowney ; M. Valero
Architectural Impact of Emerging Technologies / Session 6A:
Exploring and Exploiting Wire-Level Pipelining in Emeging Technologies / M. Niemier ; P. Kogge
NanoFabrics: Spatial Computing Using Molecular Electronics / S. Goldstein ; M. Budiu
Shared-Memory Multiprocessors / Session 6B:
A Simple Method for Extracting Models from Protocol Code / D. Lie ; A. Chou ; D. Engler ; D. Dill
Removing Architectural Bottlenecks to the Scalability of Speculative Parallelization / M. Prvulovic ; M. Garzaran ; L. Rauchwerger ; J. Torrellas
Energy-Effective Designs / Session 7:
Power and Energy Reduction Via Pipeline Balancing / R. Bahar ; S. Manne
Energy-Effective Issue Logic / D. Folegnani ; A. Gonzalez
Cache Decay: Exploiting Generational Behavior to Reduce Cache Leakage Power / S. Kaxiras ; Z. Hu ; M. Martonosi
Performance Tools and Evaluations / Session 8:
Variability in the Execution of Multimedia Applications and Implications for Architecture / P. Kaul ; S. Adve ; R. Jain ; C. Park ; J. Srinivasan
Measuring Experimental Error in Microprocessor Simulation / R. Desikan ; D. Burger ; S. Keckler
Rapid Profiling via Stratified Sampling / S. Sastry ; J. Smith
Author Index
General Chair's Message
Program Chair's Message
Conference Organization
5.

図書

図書
sponsored by IEEE Computer Society Technical Committee on Simulation, IEEE Computer Society Technical Committee on Computer Architecture ; in cooperation with ACM SIGSIM, ACM SIGARCH
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2001  xii, 432 p. ; 28 cm
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Message from the General Chair
Message from the Program Chair
Conference Organizers
Program Committee
Opening Remarks / Dr. Anthony Perzigian
Keynote Speech
High-Volume Web Servers: Traffic Patterns, Performance Implications and Resource Management / Dr. Mark S. Squillante
Real Time Systems
Specification and Validation of a Real-Time Parallel Kernel Using LOTOS / C. de Farias ; L. Pires ; W. de Souza ; C. Moron
Performance Analysis of Pools in Soft Real-Time Design Architectures / C. Juiz ; R. Puigjaner ; H. Perros
Dynamic Multipath Routing (DMPR): An Approach to Improve Resource Utilization in Networks for Real-Time Traffic / S. De ; S. Das
Parallel and Distributed Simulation
An Evaluation of Grouping Techniques for State Dissemination in Networked Multi-User Games / L. Zou ; M. Ammar ; C. Diot
Effect of Event Orderings on Memory Requirement in Parallel Simulation / Y. Teo ; B. Onggo ; S. Tay
Time-Parallel Algorithms for Simulation of Multiple Access Protocols / K. Jones
Capacity Planning
Optimal Resource Assignment in Internet Data Centers / X. Zhu ; S. Singhal
Traffic Engineering Label Switched Paths in IP Networks using a Pre-Planned Flow Optimization Model / A. Bagula ; A. Krzesinski
Wireless
QoS for Adaptive Multimedia in Wireless/Mobile Networks / Y. Xiao ; C. Chen
MoSync: A Synchronization Scheme for Cellular Wireless and Mobile Multimedia Systems / A. Boukerche ; S. Hong ; T. Jacob
Routing
Performance Study of a Multipath Routing Method for Wireless Mobile Ad Hoc Networks / K. Wu ; J. Harms
Minimizing Routing State for Light-Weight Network Simulation / P. Huang ; J. Heidemann
Non-Blocking, Localized Routing Algorithm for Balanced Energy Consumption in Mobile Ad Hoc Networks / K. Woo ; C. Yu ; D. Lee ; H. Youn ; B. Lee
Stability Analysis on Active Queue Management Algorithms in Routers / W. Wu ; Y. Ren ; X. Shan
Network Simulation/Emulation
ANML: A Language for Describing Networks / C. Kiddle ; R. Simmonds ; D. Wilson ; B. Unger
Mulit-Resolution Network Simulations Using Dynamic Component Substitution / D. Rao ; P. Wilsey
Packet Reading for Network Emulation / R. Bradford
Split Protocol Stack Network Simulations Using the Dynamic Simulation Backplane / D. Xu ; G. Riley ; R. Fujimoto
Design--Why We Don't Do It Right / Dr. John Hines
Modeling
Low-Cost Performance Prediction of Data-Dependent Data Parallel Programs / H. Gautama ; A. van Gemund
A Modular, Analytical Throughput Model for Modern Disk Arrays / M. Uysal ; G. Alvarez ; A. Merchant
Performing File Prediction with a Program-Based Successor Model / T. Yeh ; D. Long ; S. Brandt
Network Traffic
Improving Ensemble-TCP Performance on Asymmetric Networks / Q. Wu ; C. Williamson
How Does TCP Generate Pseudo-Self-Similarity? / L. Guo ; M. Crovella ; I. Matta
Generalized Processor Sharing with Long-Range Dependent Traffic Input / X. Yu ; L-J. Thng ; Y. Jiang
Benchmarking
Plain End-to-End Measurement for Local Area Network Voice Transmission Feasibility / W. Kampichler ; K. Goeschka
Tuning of the Checkpointing and Communication Library for Optimistic Simulation on Myrinet Based NOWs / F. Quaglia ; A. Santoro ; B. Ciciani
Performance of Finite Field Arithmetic in an Elliptic Curve Cryptosystem / J. Higgins ; Z. Li ; M. Clement
Switching
AQueueing Model for Pipelined Circuit-Switched Networks with the MMPP Traffic / G. Min ; M. Ould-Khaoua
Service Guarantees in Deflection Networks / W. Olesinski ; P. Gburzynski
Analysis of Timeout-Based Adaptive Wormhole Routing / H. Sarbazi-Azad ; A. Khonsari
File Systems
PROFS--Performance-Oriented Data Reorganization for Log-Structured File System on Multi-Zone Disks / J. Wang ; Y. Hu
Aggregating Caches: A Mechanism for Implicit File Prefetching / A. Amer
A Bit-Parallel Search Algorithm for Allocating Free Space / R. Burns ; W. Hineman
Large-Scale Simulation of Replica Placement Algorithms for a Serverless Distributed File System / J. Douceur ; R. Wattenhofer
Tools
Parameterized Mobile Action Generator for a Wireless PCS Network / S-E. Park ; C. Purdy
On-Line Test System Applied in Routing Protocol Test / Y. Zhao ; X. Yin ; B. Han ; J. Wu
PTPlan MPLS: A Tool for MPLS Network Dimensioning / L. Cardoso ; J. Patrao ; C. Lopes ; A. de Sousa ; R. Valadas
BRITE: An Approach to Universal Topology Generation / A. Medina ; A. Lakhina ; J. Byers
On-Line Simulation Techniques for Real-Time Management of Systems / Dr. Richard Fujimoto
WWW
The Structural Cause of File Size Distributions / A. Downey
A Simulation Analysis of Dynamic Server Selection Algorithms for Replicated Web Services / M. Bernardo
Simulation Evaluation of a Heterogeneous Web Proxy Caching Hierarchy / M. Busari
HTTP Simulator Validation Using Real Measurements: A Case Study / B. Davison
Broadband
Performance Evaluation Based on an Aggregate ATM Model / S. Galmes
Modeling and Analysis of an ABR Flow Control Algorithm for a Virtual Source/Virtual Destination Switch / C. Cseh
On Class-Based Isolation of UDP, Short-Lived and Long-Lived TCP Flows / S. Yilmaz
A Stream Tapping Protocol with Partial Preloading / J-F. Paris
Author Index
Message from the General Chair
Message from the Program Chair
Conference Organizers
6.

図書

図書
Sponsored by IEEE Computer Society Technical Committee on Computer Architecture, IEEE Computer Society Technical Commitee on Parallel Processing, ACM SIGARCH, IFIP Working Group 10.3 ; with the support of Technical University of Catalunya (UPC) ... [et al.]
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2001  x, 305 p. ; 28 cm
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目次情報: 続きを見る
General Chair's Message
Conference Organizers
Program Committee
Keynote Address / Randall D. Isaac
Simulation and Modeling / Session 1:
Basic Block Distribution Analysis to Find Periodic Behavior and Simulation Points in Applications / T. Sherwood ; E. Perelman ; B. Calder
Modeling Superscalar Processors via Statistical Simulation / S. Nussbaum ; J. Smith
Hybrid Analytical-Statistical Modeling for Efficiently Exploring Architecture and Workload Design Spaces / L. Eeckhout ; K. De Bosschere
Efficient Caches / Session 2:
Filtering Techniques to Improve Trace-Cache Efficiency / R. Rosner ; A. Mendelson ; R. Ronen
Reactive-Associative Caches / B. Batson ; T. Vijaykumar
Adaptive Mode Control: A Static-Power-Efficient Cache Design / H. Zhou ; M. Toburen ; E. Rotenberg ; T. Conte
Specialized Instruction Sets / Session 3:
Implementation and Evaluation of the Complex Streamed Instruction Set / B. Juurlink ; D. Tcheressiz ; S. Vassiliadis ; H. Wijshoff
On the Efficiency of Reductions in [mu]-SIMD Media Extensions / J. Corbal ; R. Espasa ; M. Valero
Prediction and Recovery / Justin RattnerSession 4:
Boolean Formula-Based Branch Prediction for Future Technologies / D. Jimenez ; H. Hanson ; C. Lin
Using Dataflow Based Context for Accurate Value Prediction / R. Thomas ; M. Franklin
Recovery Mechanism for Latency Misprediction / E. Morancho ; J. Maria Llaberia ; A. Olive
Memory Optimization / Session 5:
A Cost Framework for Evaluating Integrated Restructuring Optimizations / B. Chandramouli ; J. Carter ; W. Hsieh ; S. McKee
Compiling for the Impulse Memory Controller / X. Huang ; Z. Wang ; K. McKinley
On the Stability of Temporal Data Reference Profiles / T. Chilimbi
Program Optimization / Session 6:
Code Reordering and Speculation Support for Dynamic Optimization Systems / E. Nystrom ; R. Barnes ; M. Merten ; W-M. Hwu
A Unified Modulo Scheduling and Register Allocation Technique for Clustered Processors / J. Codina ; J. Sanchez ; A. Gonzalez
Cache-Friendly Implementations of Transitive Closure / M. Penner ; V. Prasanna
Technology Implications / Session 7:
Exploring the Design Space of Future CMPs / J. Huh ; D. Burger ; S. Keckler
Area and System Clock Effects on SMT/CMP Processors / J. Burns ; J-L. Gaudiot
Parallel Machines / Joel EmerSession 8:
Limits on Speculative Module-Level Parallelism in Imperative and Object-Oriented Programs on CMP Platforms / F. Warg ; P. Stenstrom
Compiler and Runtime Analysis for Efficient Communication in Data Intensive Applications / R. Ferreira ; G. Agrawal ; J. Saltz
Architectural Support for Parallel Reductions in Scalable Shared-Memory Multiprocessors / M. Garzaran ; M. Prvulovic ; Y. Zhang ; A. Jula ; H. Yu ; L. Rauchwerger ; J. Torrellas
Data Prefetching / Session 9:
Optimizing Software Data Prefetches with Rotating Registers / G. Doshi ; R. Krishnaiyer ; K. Muthukumar
Multi-Chain Prefetching: Effective Exploitation of Inter-Chain Memory Parallelism for Pointer-Chasing Codes / N. Kohout ; S. Choi ; D. Kim ; D. Yeung
Data Flow Analysis for Software Prefetching Linked Data Structures in Java / B. Cahoon
Comparing and Combining Read Miss Clustering and Software Prefetching / V. Pai ; S. Adve
Author Index
General Chair's Message
Conference Organizers
Program Committee
7.

図書

図書
sponsored by IEEE Computer Society Technical Committee on Computer Architecture, ACM SIGARCH
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2005  xviii, 557 p. ; 27 cm.
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8.

図書

図書
sponsored by IEEE Computer Society Technical Committee on Computer Architecture ... [et al.]
出版情報: Los Alamitos, Calif. ; Tokyo : IEEE Computer Society, c2005  xv, 363 p. ; 28 cm.
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9.

図書

図書
sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; [edited by Jeffrey Arnold and Kenneth L. Pocek]
出版情報: Los Alamitos, Calif. ; Tokyo : IEEE Computer Society, c2005  xi, 338 p. ; 28 cm
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10.

図書

図書
[edited by Jeffrey Arnold and Kenneth L. Pocek] ; sponsored by IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2004  x, 346 p. ; 28 cm
所蔵情報: loading…
11.

図書

図書
sponsored by the IEEE Computer Society, Technical Committee on Computer Architecture in cooperation with The University of Illinois
出版情報: Silver Spring, MD : IEEE Computer Society Press, c1985  xi, 343 p. ; 28 cm
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12.

図書

図書
sponsored by IFIP and IEEE Computer Society
出版情報: Los Alamitos, Calif. : IEEE Computer society, c1999  xv, 321 p. ; 28 cm
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目次情報: 続きを見る
Message from the Chairs
Organizing Committee
Program Committee
Reviewers
Microarchitecture / Session 1:
Exploring Instruction-Fetch Bandwidth Requirement in Wide-Issue Superscalar Processors / P. Michaud ; A. Seznec ; S. Jourdan
MPEG-2 Video Decompression on Simultaneous Multithreaded Multimedia Processors / H. Oehring ; U. Sigmund ; T. Ungerer
A Fully Asynchronous Superscalar Architecture / D. Arvind ; R. Mullins
Multithreading / Session 2:
The Need for Fast Communication in Hardware-Based Speculative Chip Multiprocessors / V. Krishnan ; J. Torellas
A Multithreaded Java Microcontroller for Thread-Oriented Real-Time Event Handling / U. Brinkschulte ; C. Krakowski ; J. Kreuzinger
On Dynamic Speculative Thread Partitioning and the MEM-Slicing Algorithm / L. Codrescu ; D. Wills
Prediction Mechanisms / Session 3:
Branch Prediction Using Selective Branch Inversion / S. Manne ; A. Klauser ; D. Grunwald
Control-Flow Speculation through Value Prediction for Superscalar Processors / J. Gonzalez ; A. Gonzalez
Exploring Last n Value Prediction / M. Burtscher ; B. Zorn
Compilation Techniques / Session 4:
Evaluating Register Allocation and Instruction Scheduling Techniques in Out-Of-Order Issue Processors / M. Valluri ; R. govindarajan
Containers on the Parallelization of General-Purpose Java Programs / P. Wu ; D. Padua
The Modulo Interval: A Simple and Practical Representation for Program Analysis / T. Nakanishi ; K. Joe ; C. Polychronopoulos ; A. Fukuda
Performance Characterization / Session 5:
Memory System Support for Image Processing / L. Zhang ; B. Carter ; W. Hsieh ; S. McKee
Performance Characteristics of a Network of Commodity Multiprocessors for the NAS Benchmarks Using a Hybrid Memory Model / F. Capello ; O. Richard
Quantifying the Benefits of SPECint Distant Parallelism in Simultaneous Multi-Threading Architectures / D. Ortega ; I. Martel ; E. Ayguade ; M. Valero
Invited Talk
High-End Computing Technology: Where is it Heading? / Greg Astfalk ; Hewlett-Packard Company
Advanced Compilation / Session 6:
LaTTe: A Java VM Just-In-Time Compiler with Fast and Efficient Register Allocation / B-S. Yang ; S-M. Moon ; S. Park ; J. Lee ; S. Lee ; J. Park ; Y. Chung ; S. Kim ; K. Ebcioglu ; E. Altman
Automatic Parallelization of Recursive Procedures / M. Gupta ; S. Mukhopadhyay ; N. Sinha
On the Complexity of Loop Fusion / A. Darte
Micro-Clusters, Clusters and SMPs / Session 7:
A Cost-Effective Clustered Architecture / R. Canal ; J-M. Parcerisa
Optimizing Data Locality for SCI-Based PC-Clusters with the SMiLE Monitoring Approach / W. Karl ; M. Leberecht ; M. Schultz
Dynamic Linking on a Shared-Memory Multiprocessor / B. Alpern ; M. Charney ; J-D. Choi ; A. Cocchi ; D. Lieber
Reducing Cache Conflicts by Partitioning and Privatizing Shared Arrays / Z. Li
Applied Analytical Techniques / Session 8:
Localizing Non-Affine Array References / N. Mitchell ; L. Carter ; J. Ferrante
On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors / M. Kandemir ; A. Choudhary ; J. Ramanujam ; P. Banerjee
Lower Bounding Techniques for the Multiprocessor Scheduling Problem with Communication Delay / S. Fujita ; T. Nakagawa
Automatic Analytical Modeling for the Estimation of Cache Misses / B. Fraguela ; R. Doallo ; E. Zapata
Linux Alighted: Down to Earth Clusters / Beau Vrolyk ; Silicon Graphics
Architecture-Driven Compilation / Session 9:
Cameron: High level Language Compilation for Reconfigurable Systems / J. Hammes ; B. Rinker ; W. Bohm ; W. Najjar ; B. Draper ; R. Beveridge
Predicated Static Single Assignment / B. Simon ; B. Calder
The Effect of Program Optimization on Trace Cache Efficiency / D. Howard ; M. Lipasti
Advanced Parallelization / Session 10:
Data Dependence Testing in Practice / K. Psarris ; K. Kyriakopoulos
On Index Set Splitting / M. Griebl ; P. Feautrier ; C. Lenguaer
Efficient Parallelization Using Combined Loop and Data Transformations / M. O'boyle ; P. Knijnenburg
Predication and Speculation / Session 11:
Caching and Predicting Branch Sequences for Improved Fetch Effectiveness / S. Onder ; J. Xu ; R. Gupta
In Search of Speculative Thread-Level Parallelism / J. Oplinger ; D. Heine ; M. Lam
Looking at History to Filter Allocations in Prediction Tables / E. Morancho ; J. Maria Llaberia ; A. Olive
Author Index
Message from the Chairs
Organizing Committee
Program Committee
13.

図書

図書
sponsors IFIP WG 10.3, IEEE Computer Society, ACM SIGARCH
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1997  ix, 319 p. ; 28 cm
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14.

図書

図書
sponsored by the IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Cailf : IEEE Computer Society Press, c1998  xii, 352 p. ; 28 cm
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15.

図書

図書
sponsored by IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1997  x, 250 p. ; 28 cm
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16.

図書

図書
sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; edited by Kenneth L. Pocek and Jeffrey Arnold
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1999  x, 319 p. ; 28 cm
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目次情報: 続きを見る
Co-Chairs and Program Committee
Tools 1 / Session 1:
Macro-Based Hardware Compilation of Java Bytecodes into a Dynamic Reconfigurable Computing System / J.M.P. Cardoso ; H.C. Neto
A CAD Suite for High-Performance FPGA Design / B. Hutchings ; P. Bellows ; J. Hawkins ; S. Hemmert ; B. Nelson ; M. Rytting
Formal Verification of Reconfigurable Cores / S. Singh ; C.J. Lillieroth
Network Applications / Session 2:
Transmutable Telecom System and Its Application / T. Miyazaki ; T. Murooka ; M. Katayama ; A. Takahara
Implementation and Evaluation of a Prototype Reconfigurable Router / J.R. Hess ; D.C. Lee ; S.J. Harper ; M.T. Jones ; P.M. Athanas
Compilation / Session 3:
Pipeline Vectorization for Reconfigurable Systems / M. Weinhardt ; W. Luk
Automatic Allocation of Arrays to Memories in FPGA Processors with Multiple Memory Banks / M.B. Gokhale ; J.M. Stone
Parallelizing Applications into Silicon / J. Babb ; M. Rinard ; C.A. Moritz ; W. Lee ; M. Frank ; R. Barua ; S. Amarasinghe
Architectures / Session 4:
Reconfigurable Elements for a Video Pipeline Processor / M.R. Piacentino ; G.S. van der Wal ; M.W. Hansen
ConCISe: A Compiler-Driven CPLD-Based Instruction Set Accelerator / B. Kastrup ; A. Bink ; J. Hoogerbrugge
Tools 2 / Session 5:
CPR: A Configuration Profiling Tool / S. Cadambi ; S.C. Goldstein
Debugging Techniques for Dynamically Reconfigurable Hardware / N. McKay
Improving Simulation Accuracy in Design Methodologies for Dynamically Reconfigurable Logic Systems / M. Vasilko ; D. Cabanis
Graphics Applications / Session 6:
Reconfigurable Computing for Augmented Reality / T.K. Lee ; J.R. Rice ; N. Shirazi ; P.Y.K. Cheung
Sepia: Scalable 3D Compositing using PCI Pamette / L. Moll ; A. Heirich ; M. Shand
Applications / Session 7:
An Edge-Endpoint-Based Configurable Hardware Architecture for VLSI CAD Layout Design Rule Checking / Z. Luo ; M. Martonosi ; P. Ashar
Fafner--Accelerating Nesting Problems with FPGAs / J.C. Alves ; J.C. Ferreira ; C. Albuquerque ; J.F. Oliveira ; J.S. Ferreira ; J. Silva Matos
DSP Applications / Session 8:
Field Programmable Gate Array Based Radar Front-End Digital Signal Processing / T.J. Moeller ; D.R. Martinez
Optimizing FPGA-Based Vector Product Designs / D. Benyamin ; J. Villasenor
Run Time Systems / Session 9:
PCI-PipeRench and the SwordAPI: A System for Stream-based Reconfigurable Computing / R. Laufer ; R.R. Taylor ; H. Schmit
Safe and Protected Execution for the Morph/AMRM Reconfigurable Processor / A.A. Chien ; J.H. Byun
Implementing an API for Distributed Adaptive Computing Systems / M. Jones ; L. Scharf ; J. Scott ; C. Twaddle ; M. Yaconis ; K. Yao ; P. Athanas ; B. Schott
Arithmetic / Session 10:
A Super-Serial Galois Fields Multiplier for FPGAs and its Application to Public-Key Algorithms / G. Orlando ; C. Paar
Automatic Floating to Fixed Point Translation and its Application to Post-Rendering 3D Warping / M.P. Leong ; M.Y. Yeung ; C.K. Yeung ; C.W. Fu ; P.A. Heng ; P.H.W. Leong
Dynamic Precision Management for Loop Computations on Reconfigurable Architectures / K. Bondalapati ; V.K. Prasanna
Poster Session 1
Accelerating Run-Time Reconfiguration on FCCMs / J.-P. Heron ; R.F. Woods
A Virtual Hardware Handler for RTR Systems / R. Turner ; S. Sezer
Algorithm Analysis and Mapping Environment for Adaptive Computing Systems: Further Results / E.K. Pauer ; P.D. Fiore ; J.M. Smith
Development System for FPGA-Based Digital Circuits / V. Sklyarov ; J. Fonseca ; R. Monteiro ; A. Oliveira ; A. Melo ; N. Lau ; I. Skliarova ; P. Neves ; A. Ferrari
Design of a JTAG Based Run Time Reconfigurable System / C. Cousineau ; F. Laperle ; Y. Savaria
Architectures for System-Level Applications of Adaptive Computing / C. Chen ; S. Crago ; J. Czarnaski ; M. French ; I. Hom ; T. Tho ; T. Valenti
Task-level Partitioning and RTL Design Space Exploration for Multi-FPGA Architectures / V. Srinivasan ; R. Vemuri
Enabling Automatic Module Generation for FCCM Compilers / A. Koch
Poster Session 2
ICARUS: A Dynamically Reconfigurable Computer Architecture / M. Baxter
SONIC--A Plug-In Architecture for Video Processing / S.D. Haynes ; J. Stone
A Reconfigurable Platform for Academic Purposes / C. Teuscher ; J.-O. Haenni ; F.J. Gomez ; H.F. Restrepo ; E. Sanchez
VHDL Placement Directives for Parametric IP Blocks / J. Hwang ; C. Patterson ; S. Mitra
Runlength Compression Techniques for FPGA Configurations / S. Hauck ; W.D. Wilson
Poster Session 3
Accelerating An IR Automatic Target Recognition Application with FPGAs / J. Jean ; X. Liang ; B. Drozd ; K. Tomko
Mapping of an Automated Target Recognition Application from a Graphical Software Environment to FPGA-based Reconfigurable Hardware / B. Levine ; S. Natarajan ; C. Tan ; D. Newport ; D. Bouldin
Hybrid Data/Configuration Caching for Striped FPGAs / D. Deshpande ; A.K. Somani ; A. Tyagi
On Reconfiguring Cache for Computing / H.-S. Kim
Reconfigurable Pipelines in VLIW Execution Units / R.D. Williams ; B.D. Kuebert
Fast Online Placement for Reconfigurable Computing Systems / K. Bazargan ; M. Sarrafzadeh
Poster Session 4
A Compact Fast Variable Key Size Elliptic Curve Cryptosystem Coprocessor / L. Gao ; S. Shrivastava ; H. Lee ; G.E. Sobelman
A Virtual Logic Algorithm for Solving Satisfiability Problems Using Reconfigurable Hardware / M. Abramovici ; J.T. de Sousa
Reducing Compilation Time of Zhong's FPGA-based SAT solver / P.K. Chan ; M.J. Boyd ; S. Goren ; K. Klenk ; V. Kodavati ; R. Kundu ; M. Margolese ; J. Sun ; K. Suzuki ; E. Thorne ; X. Wang ; J. Xu ; M. Zhu
FPGA-based Structures for On-line FFT and DCT / D. Lau ; A. Schneider ; M.D. Ercegovac
An FPGA-based Fan Beam Image Reconstruction Module / L. Maltar ; F.M.G. Franca ; V.C. Alves ; C.L. Amorim
Bezier Curve Rendering on Virtex / D. MacVicar ; R. Slous
Author Index
Co-Chairs and Program Committee
Tools 1 / Session 1:
Macro-Based Hardware Compilation of Java Bytecodes into a Dynamic Reconfigurable Computing System / J.M.P. Cardoso ; H.C. Neto
17.

図書

図書
sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; edited by Kenneth L. Pocek and Jeffrey Arnold
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1998  x, 344 p. ; 28 cm
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18.

図書

図書
edited by A. Gottlieb, Y. Li, and E. Schenfeld ; sponsored by IEEE Computer Society Technical Committee on Computer Architecture (TCCA), the National Science Foundation (NSF) in cooperation with ACM Special Interest Group on Architecture (SIGARCH) ... [et al.]
出版情報: Los Alamitos, Calif. ; Tokyo : IEEE Computer Society Press, c1996  xvi, 369 p. ; 28 cm
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19.

図書

図書
editors, Stephen J. Turner, David J. Roberts, and Linda F. Wilson ; sponsored by IEEE Computer Society Technical Committee on Parallel Processing, IEEE Computer Society Technical Committee on Simulation, IEEE Computer Society Technical Committee on Computer Architecture ; supported by ACM SIGSIM
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2004  xiv, 248 p. ; 28 cm
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20.

図書

図書
[edited by Doug DeGroot and Pete Harrison] ; sponsored by IEEE TCCA and IEEE TCSIM
出版情報: Los Alamitos, Calif. : IEEE, c2004  xviii, 614 p. ; 28 cm
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目次情報: 続きを見る
Message from the General Chair
Message from the Program Committee Chairs
Organizing Committee
Program Committee
Steering Committee
Scientific Reviewers
Wireless and Mobile Networks / Session 1:
Experimental Evaluation of TCP Performance in Multi-Hop Wireless Ad Hoc Networks / A. Gupta ; I. Wormsbecker ; C. Williamson
On Mobility-Capacity-Delay Trade-off in Wireless Ad Hoc Networks / R. M. de Moraes ; H. R. Sadjadpour ; J. J. Garcia-Luna-Aceves
Stochastic Models and Scheduling / Session 2:
Approximate Analysis of Non-Markovian Stochastic Systems with Multiple Time Scale Delays / S. Haddad ; P. Moreaux
Size-Based Scheduling Policies with Inaccurate Scheduling Information / D. Lu ; H. Sheng ; P. Dinda
A GSPN Model for the Analysis of DNS-Based Redirection in Distributed Web Systems / R. Gaeta ; M. Gribaudo ; D. Manini ; M. Sereno
Performance Engineering Tools / Session 3A:
ASPEN: Towards Effective Simulation of Threads and Engines in Evolving Platforms / J. Moses ; R. Illikkal ; R. Iyer ; R. Huggahalli ; D. Newell
SimplePipe: A Simulation Tool for Task Allocation and Design of Processor Pipelines with Application to Network Processors / M. A. Franklin ; V. Joshi
Performance Engineering with the UML Profile for Schedulability, Performance and Time: A Case Study / A. J. Bennett ; A. J. Field
SPOT: An Extensible Model Checking Library Using Transition-Based Generalized Buchi Automata / A. Duret-Lutz ; D. Poitrenaud
Networks and Protocols / Session 3B:
Is TCP Packet Reordering Always Harmful? / G. Neglia ; V. Falletta ; G. Bianchi
Analysis of Peer-to-Peer Systems: Workload Characterization and Effects on Traffic Cacheability / M. Andreolini ; R. Lancellotti ; P. S. Yu
Performance Evaluation of Fairness-Oriented Active Queue Management Schemes / M. Huggard ; M. Robin ; A. Biotrika ; C. McGoldrick
Hybrid WLAN for Data Dissemination Applications / C.-J. Lin ; C.-F. Chou
Stochastic Models / Session 4A:
Dual-Processor Parallelisation of Symbolic Probabilistic Model Checking / M. Kwiatkowska ; D. Parker ; Y. Zhang ; R. Mehmood
The N-Burst/G/1 Model with Heavy-Tailed Service-Times Distribution / R. Nossenson ; H. Attiya
Structured Stochastic Modeling of Fault-Tolerant Systems / C. Bertolini ; L. Brenner ; P. Fernandes ; A. Sales ; A. F. Zorzo
An Optimisation Model for a Two-Node Router Network / N. Gulpinar ; P. Harrison ; B. Rustem ; L.-F. Pau
A Performance Study of Session State Re-Establishment Schemes in IP-Based Micro-Mobility Scenarios / T. Chen ; G. Schafer ; A. Wolisz ; M. SortaisSession 4B:
A Hysteresis Model for Web/TCP Transfer Latency / Y. Li
Modeling the Burstiness of TCP / P. Dimopoulos ; P. Zeephongsekul ; Z. Tari
Stable Node-Disjoint Multipath Routing with Low Overhead in Mobile Ad Hoc Networks / X. Li ; L. Cuthbert
Indepth: Timeliness Assessment of Ethernet/IP-Based Systems / N. Pereira ; E. Tovar ; L. M. Pinho
Assessing the Effectiveness of IEEE 802.11e in Multi-Hop Mobile Network Environments / C. T. Calafate ; P. Manzoni ; M. P. MalumbresSession 5:
Causal Multicast in Mobile Networks / P. Chandra ; A. D. Kshemkalyani
Queueing Networks / Session 6:
Bottlenecks Identification in Multiclass Queueing Networks Using Convex Polytopes / G. Casale ; G. Serazzi
A New Recursive Algorithm for Computing Generating Functions in Closed Multi-Class Queueing Networks / P. G. Harrison ; T. T. Lee
Multiclass Multiservers with Deferred Operations in Layered Queueing Networks, with Software System Applications / G. Franks ; M. Woodside
Internet Architecture and Applications / Session 7A:
A Bandwidth-Efficient Scheduler for MPLS DiffServ Networks / X. Zeng ; C.-H. Lung ; C. Huang ; A. Srinivasan
A Framework for Resource Allocation in Grid Computing / D. A. Menasce ; E. Casalicchio
Simulating Internet Worms / G. F. Riley ; M. I. Sharif ; W. Lee
Routing in an Internet-Scale Network Emulator / J. Chen ; D. Gupta ; K. V. Vishwanath ; A. C. Snoeren ; A. Vahdat
Large-Scale Simulation Models of BGP / X. A. DimitropoulosSession 7B:
Engineering Mobile Wireless Publish/Subscribe Systems for High Performance / U. Farooq ; S. Majumdar ; E. W. Parsons
An Energy-Aware Framework for Coordinated Dynamic Software Management in Mobile Computers / Y. Fei ; L. Zhong ; N. K. Jha
Performance Analysis of Reliable Multicast Transport Protocols for GEO Satellite Networks / P. Chumchu ; R. Boreli ; A. Seneviratne
Simulation / Session 8A:
Processing Dynamic PDEVS Models / J. Himmelspach ; A. M. Uhrmacher
Instrumenting Network Simulators for Evaluating Energy Consumption in Power-Aware Ad-Hoc Network Protocols / C. B. Margi ; K. Obraczka
Fast Simulation of Excessive Population Size in Tandem Jackson Networks / W. Sandmann
Simulation Evaluation of Hybrid SRPT Scheduling Policies / M. Gong
Design and Implementation of a High Speed Microprocessor Simulator BurstScalar / T. Nakada ; H. Nakashima
Wireless Networks / Session 8B:
Bluetooth Simulations for Wireless Sensor Networks Using GTNetS / X. Zhang
End-to-End Delay Heuristics for Adaptive Optical Wireless Networks / A. M. Mahdy ; J. S. Deogun ; S. K. Mehta
Topology Control, Resources Allocation and Routing in Wireless Sensor Networks / X. Wang ; T. Berger
MC-CDMA Based IEEE 802.11 Wireless LAN / G. Orfanos ; J. Habetha ; L. Liu
Storage and Peer-to-Peer Systems / Session 9:
Disk Scrubbing in Large Archival Storage Systems / T. J. E. Schwarz ; Q. Xin ; E. L. Miller ; D. D. E. Long ; A. Hospodor ; S. Ng
Predicting When Not to Predict / K. Brandt ; A. Amer
Reliable Response Delivery in Peer-to-Peer Systems / X. Liu ; Y. Liu ; L. Xiao
Internet Architectures and Simulation / Session 10:
VRing: A Case for Building Application-Layer Multicast Rings (Rather Than Trees) / A. Sobeih ; W. Yurcik ; J. C. Hou
A Flexible Architecture for Remote Server-Based Emulation / Y. Gu ; R. Fujimoto
BencHMAP: Benchmark-Based, Hardware and Model-Aware Partitioning for Parallel and Distributed Network Simulation / D. Xu ; M. Ammar
Measurement and Benchmarking / Session 11A:
Architecture Independent Performance Characterization and Benchmarking for Scientific Applications / E. Strohmaier ; H. Shan
Database Server Workload Characterization in an E-Commerce Environment / F. Liu ; Y. Zhao ; W. Wang ; D. Makaroff
Mining Performance Data from Sampled Event Traces / R. Portillo ; D. Villa ; P. J. Teller ; B. Olszewski
Statistical Selection of Compiler Options / R. P. J. Pinkers ; P. M. W. Knijnenburg ; M. Haneda ; H. A. G. Wijshoff
Routing Algorithms / Session 11B:
Performance Analysis and Improvement of HighSpeed TCP with TailDrop/RED Routers / Z. Zhang ; G. Hasegawa ; M. Murata
Network Performance of Multi-Service Circuit Switched Networks: Simulational Comparison of Variants of DAR and RTNR / L. Jorge ; J. Craveirinha ; T. Gomes
Fast Update of Forwarding Tables on TCAM / W. Wu ; B. Shi ; F. Wang
Performance Modeling of Fully Adaptive Wormhole Routing in 2-D Mesh-Connected Multiprocessors / H. H. Najaf-abadi ; H. Sarbazi-azad ; P. Rajabzadeh
A Computational Complexity-Aware Model for Performance Analysis of Software Servers / V. Mathur ; V. ApteSession 12A:
Comparison of Predictive Techniques in Cluster-Based Network Servers with Resource Allocation / K. Gilly ; S. Alcaraz ; C. Juiz ; R. Puigjaner
Performance Characterisation and Verification of JavaSpaces Based on Design of Experiments / F. Hancke ; T. Dhaene ; J. Broeckhove
A Quotient Graph for Asymmetric Distributed Systems / C. Bellettini ; L. Capra
Storage Systems / Session 12B:
Reliability of MEMS-Based Storage Enclosures / B. Hong ; S. A. Brandt
Caching Values in the Load Store Queue / D. Nicolaescu ; A. Veidenbaum ; A. Nicolau
Storage Device Performance Prediction with CART Models / M. Wang ; K. Au ; A. Ailamaki ; A. Brockwell ; C. Faloutsos ; G. R. Ganger
Mramfs: A Compressing File System for Non-Volatile RAM / N. K. Edel ; D. Tuteja
Execution-Driven Simulation of Network Storage Systems / Y. Wang ; D. Kaeli
Author Index
Message from the General Chair
Message from the Program Committee Chairs
Organizing Committee
21.

図書

図書
[edited by Vito di Gesù, Domenco Tegolo] ; sponsored by IEEE Computer Society Technical Committee on Pattern Analysis and Machine Intelligence, IEEE Computer Society Technical Committee on Parallel Processing, IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2005  xi, 340 p. ; 28 cm
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22.

図書

図書
sponsored by the IEEE Computer Society, Technical Committee on Computer Architecture
出版情報: Los Alamitos, Calif. ; Tokyo : IEEE Computer Society Press, c1996  xii, 335 p. ; 28 cm
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23.

図書

図書
IEEE Computer Society TCCA, ACM SIGARCH
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2004  xiv, 388 p. ; 28 cm
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目次情報: 続きを見る
General Co-Chairs' Message
Program Chair's Message
Committees
Reviewers
Keynote 1
Computer Architecture: Challenges and Opportunities for the Next Decade / Tilak Agerwala
Architecture Evaluations / Session 1:
Evaluation of the Raw Microprocessor: An Exposed-Wire-Delay Architecture for ILP and Streams / M. Taylor ; W. Lee ; J. Miller ; D. Wentzlaff ; B. Greenwald ; V. Strumpen ; N. Shnidman ; I. Bratt ; H. Hoffmann ; P. Johnson ; J. Kim ; A. Saraf ; J. Psota ; M. Frank|cS. Amarasinghe ; A. Agarwal
Evaluating the Imagine Stream Architecture / J. Ahn ; W. Dally ; B. Khailany ; U. Kapasi ; A. Das
Field-testing IMPACT EPIC Research Results in Itanium 2 / J. Sias ; S. Ueng ; G. Kent ; I. Steiner ; E. Nystrom ; W. Hwu
Parallelism in Microarchitectures / Session 2A:
Wire Delay is Not a Problem for SMT (In the Near Future) / Z. Chishti ; T. Vijaykumar
The Vector-Thread Architecture / R. Krashinsky ; C. Batten ; S. Gerding ; M. Hampton ; B. Pharris ; J. Casper ; K. Asanovic
Single-ISA Heterogeneous Multi-Core Architectures for Multithreaded Workload Performance / R. Kumar ; D. Tullsen ; P. Ranganathan ; N. Jouppi ; K. Farkas
Microarchitecture Optimizations for Exploiting Memory-Level Parallelism / Y. Chou ; B. Fahs ; S. Abraham
Memory Consistency / Session 2B:
Memory Ordering: A Value-Based Approach / H. Cain ; M. Lipasti
Transactional Memory Coherence and Consistency / L. Hammond ; V. Wong ; M. Chen ; B. Hertzberg ; J. Davis ; B. Carlstrom ; M. Prabhu ; H. Wijaya ; C. Kozyrakis ; K. Olukotun
TSOtool: A Program for Verifying Memory Systems Using the Memory Consistency Model / S. Hangal ; D. Vahia ; C. Manovit ; J. Lu ; S. Narayanan
SMTp: An Architecture for Next-generation Scalable Multi-threading / M. Chaudhuri ; M. Heinrich
Panel: Supporting ILP in Tiled Architectures: Wasted Effort, or a Good Idea?
Keynote 2
High Performance Throughput Computing / Marc Tremblay ; Sun Microsystems
Power and Energy / Session 3:
A Formal Approach to Frequent Energy Adaptations for Multimedia Applications / C. Hughes ; S. Adve
Synchroscalar: A Multiple Clock Domain, Power-Aware, Tile-Based Embedded Processor / J. Oliver ; R. Rao ; P. Sultana ; J. Crandall ; E. Czernikowski ; L. Jones ; D. Franklin ; V. Akella ; F. Chong
Power Awareness through Selective Dynamically Optimized Traces / R. Rosner ; Y. Almog ; M. Moffie ; N. Schwartz ; A. Mendelson
Interconnect and I/O / Session 3B:
X-RAY: A Non-Invasive Exclusive Caching Mechanism for RAIDs / L. Bairavasundaram ; M. Sivathanu ; A. Arpaci-Dusseau ; R. Arpaci-Dusseau
Low-Latency Virtual-Channel Routers for On-Chip Networks / R. Mullins ; A. West ; S. Moore
Immunet: A Cheap and Robust Fault-Tolerant Packet Routing Mechanism / V. Puente ; J. Gregorio ; F. Vallejo ; R. Beivide
Compression and Debugging / Session 4A:
Adaptive Cache Compression for High-Performance Processors / A. Alameldeen ; D. Wood
iWatcher: Efficient Architectural Support for Software Debugging / P. Zhou ; F. Qin ; W. Liu ; Y. Zhou ; J. Torrellas
Superscalars / Session 4B:
From Sequences of Dependent Instructions to Functions: An Approach for Improving Performance without ILP or Speculation / S. Yehia ; O. Temam
Prophet/Critic Hybrid Branch Prediction / A. Falcon ; J. Stark ; A. Ramirez ; K. Lai ; M. Valero
Support for Reliability / Session 5A:
Techniques to Reduce the Soft Error Rate of a High-Performance Microprocessor / C. Weaver ; J. Emer ; S. Mukherjee ; S. Reinhardt
The Case for Lifetime Reliability-Aware Microprocessors / J. Srinivasan ; P. Bose ; J. Rivers
Exploiting Resonant Behavior to Reduce Inductive Noise / M. Powell
Register File / Session 5B:
Use-Based Register Caching with Decoupled Indexing / J. Butts ; G. Sohi
A Content Aware Integer File Organization / R. Gonzalez ; A. Cristal ; D. Ortega ; A. Veidenbaum
Physical Register Inlining / B. Mestan ; E. Gunadi
Performance Methodologies / Session 6A:
A First-Order Superscalar Processor Model / T. Karkhanis ; J. Smith
Control Flow Modeling in Statistical Simulation for Accurate and Efficient Processor Design Studies / L. Eckhout ; R. Bell ; B. Stougie ; K. De Bosschere ; L. John
Microarchitectural Concepts / Session 6B:
Extended Split-Issue: Enabling Flexibility in the Hardware Implementation of NUAL VLIW DSPs / B. Iyer ; S. Srinivasan ; B. Jacob
A Complexity-Effective Approach to ALU Bandwidth Enhancement for Instruction-Level Temporal Redundancy / A. Parashar ; S. Gurumurthi ; A. Sivasubramaniam
Author Index
General Co-Chairs' Message
Program Chair's Message
Committees
24.

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図書
sponsored by IEEE Computer Society TCCA, ACM SIGARCH
出版情報: Los Alamitos, CA : IEEE Computer Society, c2000 , New York, NY : the Association for Computing Machinery, c2000  vi, 328 p. ; 28 cm
シリーズ名: Computer architecture news ; v.28, no.2, May 2000
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25.

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図書
sponsored by IEEE Computer Society, IEEE Computer Society Technical Committee on Simulation(IEEE-TCSIM), IEEE Computer Society Technical Committee on Computer Architecture(IEEE-TCCA)
出版情報: Los Alamitos : IEEE Computer Society, c1999  xiv, 367 p. ; 28 cm
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Message from the Program Chair
Organizing Committee
Program Committee
Reviewers
ATM Networks / Session 1:
The Design and Management of ATM Virtual Path Connection Networks / A. Arvidsson ; S. Berezner ; A. Krzesinski
Performance and Robustness Testing of Explicit-Rate ABR Flow Control Schemes / M. Zoranovic ; C. Williamson
Using ATM Services for (In) Efficient Support of TCP / J. Sydir ; N. Taft-Plotkin ; N. Akar
Local Resource Allocation for Providing End to End Delay Guarantees in ATM Networks Using PGPS Scheduling / A. Ayad ; K. Elsayed ; M. El-hadidi
Mobile, Wireless and Optical Networks / Session 2:
Performance Evaluation of Distributed Co-Ordination Function for IEEE 802.11 Wireless LAN Protocol in Presence of Mobile and Hidden Terminals / S. Khurana ; A. Kahol ; S. Gupta ; P. Srimani
TCP Performance and Buffer Provisioning for Internet in Wireless Networks / H. Syed ; K. Das ; M. Devetsikiotis
Fair Scheduling in an Optical Interconnection Network / C. Baw ; R. Chamberlain ; M. Franklin
Simulation Techniques and Environments / Session 3:
The SimUTC Fault-Tolerant Distributed Systems Simulation Toolkit / B. Weiss ; G. Gridling ; U. Schmid ; K. Schossmaier
Optimizing Message Aggregation for Parallel Simulation on High Performance Clusters / C. Pham ; C. Albrecht
SDH Digital Cross-Connect Traffic Generation Algorithm / B. Johnston ; H. Owen
Simulation of Broadband Multiple Access Protocols for Wireless Networks / B. Bing
Network Simulation / Session 4:
CAC Performance with Self-Similar Traffic: Simulation Study and Performance Results / Y. Wang ; J. Doerksen
Simulation of Ultra-Large Communication Networks / D. Rao ; P. Wilsey
Network Simulations of a General Class of Partial-Connection Multiple-Bus Systems / H-Y. Tu ; L. Hawkes
A Generic Framework for Parallelization of Network Simulations / G. Riley ; R. Fujimoto ; M. Ammar
Performance Techniques / Session 5:
Failure Distance Based Bounds for Steady-State Availability without the Knowledge of Minimal Cuts / V. Sune ; J. Carrasco
Towards Performance Analysis with Partially Symmetrical SWN / L. Capra ; C. Dutheillet ; G. Franceschinis ; J. Ilie
Jump Transitions in Second Order FSPNs / K. Wolter
Approximate Analysis of Open Network of GE/GE/m/N Queues with Transfer Blocking / H. Tahilramani ; D. Manjunath ; S. Bose
Performance Modeling and Analysis / Session 6:
An Analytical Comparison of Cooperation Protocols for Web Proxy Servers / F. Quaglia ; B. Ciciani ; M. Colajanni
Modeling Overhead in Servers with Transactional Workloads / M. Curiel ; R. Puigjaner
Analytical Modeling of the Network Traffic Performance / I. Garces ; D. Franco ; E. Luque
Universal Benchmark Suites / J. Dujmovic
Workload / Session 7:
Analysis of Personal Computer Workloads / M. Zhou ; A. Smith
Modeling User Behavior: A Layered Approach / H. Hlavacs ; G. Kotsis
Predicting Behavior Patterns Using Adaptive Workload Models / S. Raghavan ; N. Swaminathan ; J. Srinivasan
Analysis of Self-Similarity in I/O Workload Using Structural Modeling / M. Gomez ; V. Santonja
QoS and Multimedia / Session 8:
An Auction-Based Flexible Pricing Scheme for Renegotiated QoS Connections and Its Evaluation / G. Malewicz ; A. Shvartsman
Adaptive CPU Scheduling Policies for Mixed Multimedia and Best-Effort Workloads / M. Rau ; E. Smirni
On the Design of Efficient Video-on-Demand Broadcast Schedules / A. Hu ; I. Nikolaidis ; P. van Beek
Combining Pay-Per-View and Video-on-Demand Services / J-F. Paris ; S. Carter ; D. Long
Memory, Cache and I/O Performance / Session 9:
Multiprocessor Memory Reference Generation Using Cerberus / J. Rothman
Modeling Memory Reference Patterns of Programs in Cache Memory Systems / R. Mukkamala ; A. Agrawala
A System-Assisted Disk I/O Simulation Technique / F. Sorenson ; E. Sorenson ; J. Flanagan ; H. Zhou
Prediction of Disk Arm Movements in Anticipation of Future Requests / E. Mumolo
Software Analysis / Session 10:
A Design and Management Framework for Mobile Agent Systems / O. Rana
A Synchronization Protocol for Group Communication Systems / A. Benslimane ; A. Abouaissa
Evaluating Concurrency Options in Software Specifications / W. Scratchley ; C. Woodside
Feature Interaction as a Satisfiability Problem / C. Areces ; W. Bouma ; M. de Rijke
Analysis of Security Systems / Session 11:
An Experimental Analysis of Cryptographic Overhead in Performance-Critical Systems / W. Freeman ; E. Miller
Model Checking the Secure Electronic Transaction (SET) Protocol / S. Lu ; S. Smolka
Author Index
Message from the Program Chair
Organizing Committee
Program Committee
26.

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図書
sponsored by IEEE Computer Society, IEEE Computer Society Technical Committee on Simulation, IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos : IEEE Computer Society, c2000  xiii, 584 p. ; 28 cm
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Message from the General Chair
Message from the Program Chairs
Organizing Committee
Program Committee
Author Index
Invited Talk
Networks with Cognitive Packets / Erol Gelenbe
Performance Evaluation of WWW 1
Intelligent Prefetch in WWW Using Client Behavior Characterization / N. Swaminathan ; S. Raghavan
Geographic Load Balancing for Scalable Distributed Web Systems / V. Cardellini ; M. Colajanni ; P. Yu
Sources and Characteristics of Web Temporal Locality / S. Jin ; A. Bestavros
Towards a Rate-Based TCP Protocol for the Web / J. Ke ; C. Williamson
Wireless Systems and Protocols
Using N-body Algorithms for Interference Computation in Wireless Cellular Simulations / L. Perrone ; D. Nicol
A Performance Comparison of Energy Consumption for Mobile Ad Hoc Network Routing Protocols / J.-C. Cano ; P. Manzoni
Analysis of Randomized Congestion Control in DSDV Routing / A. Boukerche ; A. Fabbri ; S. Das
Distributed Dynamic Channel Allocation for Mobile Communication Systems / S. Hong ; T. Jacob
Communication Systems 1
Establishing a Trade-off between Unicast and Multicast Retransmission Modes for Reliable Multicast Protocol / C. Cordeiro ; D. Sadok ; J. Kelner
Fieldbus Network Simulation Using a Time Extended Estelle Formalism / L. Hohwiller ; S. Wendling
A Performance Model of Broadcast Communication in Wormhole-Routed Hypercubes / A. Shahrabi ; M. Ould-Khaoua ; L. Mackenzie
A Transaction-Level Tool for Predicting TCP Performance and for Network Engineering / J. Walrand
Computer Systems
Profiling I/O Interrupts in Modern Architectures / L. Schaelicke ; A. Davis ; S. McKee
Sector Cache Design and Performance / J. Rothman ; A. Smith
A Method for an Integrated Simulation Linked with Scheduling Policies on a Program-Driven Simulator / H. Choi ; H.-J. Suh ; S. Jhan ; C. Jhon
Experimental Analysis of Coherency Behavior of Shared Memory Scientific Applications / JT. Acquaviva ; W. Jalby
Distributed Systems and Applications
TC3: A Temporally Correct Concurrency Control Algorithm for Distributed Databases / T. Tuck
Analysis of Large-Scale Distributed Information Systems / J. Hellerstein ; T. Jayram ; M. Squillante
An Efficient Implementation of Interactive Video-on-Demand / S. Carter ; D. Long ; J.-F. Paris
A Scalable Distributed Multimedia File System Using Network Attached Autonomous Disks / C. Akinlar ; S. Mukherjee
Workload Analysis
Using Complete System Simulation for Temporal Debugging of General Purpose Operating Systems and Workload / L. Albertsson ; P. Magnusson
A New Approach in the Modeling and Generation of Synthetic Disk Workload / M. Gomez ; V. Santonja
Scowl: A Tool for Characterization of Parallel Workload and its Use on Splash-2 Application Suite / D. Marinov ; D. Magdic ; A. Milenkovic ; J. Protic ; I. Tartalja ; V. Milutinovic
A Performance Comparison of Monofractal and Multifractal Traffic Streams / R. Balakrishnan
New Challenges in the Performance Evaluation of Communication Networks / Jean Walrand
Modeling and Simulation Techniques 1
Simulation of Fluid Stochastic Petri Nets / M. Gribaudo ; M. Sereno
A Performance Analysis Framework for a System Lifespan / D. Pierce ; D. Rover
The Impact of National Level Indicators on PC Adoption / K. Bagchi ; R. Cerveny
A Performance Study of Dynamic Replication Techniques in Continuous Media Servers / C.-F. Chou ; L. Golubchik ; J. Lui
Tools Session 1: Performance
NetLogger: A Toolkit for Distributed System Performance Analysis / D. Gunter ; B. Tierney ; B. Crowley ; M. Holding ; J. Lee
simCore: An Event-Driven Simulation Framework for Performance Evaluation of Computer Systems / Y. Jung ; Y. Chiba ; D. Kim ; Y. Kim
A Tool for Performance Measurement of NT Networks / W.-S. Wang ; J. Dujmovic ; W. Mathews
Network Modeling and Simulation 1
Parallel Co-Simulation of Conventional and Active Networks / D. Rao ; P. Wilsey
Modeling of Pipelined Circuit Switching in Multicomputer Networks / G. Min ; H. Sarbazi-Azad
Modeling and Simulation of Storage Area Networks / X. Molero ; F. Silla ; J. Duato
A Parallel Discrete Event IP Network Emulator / R. Bradford ; R. Simmonds ; B. Unger
Tools Session 2: Traffic
The Active Traffic Control Mechanism for Layered Multimedia Multicast in Active Network / S. Kang ; H. Youn ; Y. Lee ; D. Lee ; M. Kim
The synTraff Suite of Traffic Modeling Toolkits
The Queueing Network Analysis Tool (QNAT) / H. Kaur ; D. Manjunath ; S. Bose
Parallel and Distributed Simulation Techniques
An Efficient Method for Improving Large Optimistic PDES / R. Suppi ; F. Cores ; E. Luque
Comparison of Message Aggregation Strategies for Parallel Simulations on a High Performance Cluster / C. Pham
Probablistic Checkpointing in Time Warp Parallel Simulation / S. Tay ; Y. Teo
An Agent-Based DDM Filtering Mechanism / G. Tan ; L. Xu ; F. Moradi ; Y. Zhang
Tools Session 3: Simulation and Analysis
Intelligent Online BGP-4 Analyzer / Y. Zhao ; J. Wu ; B. Yu
Register-Transfer Level Simulation / T. Braunl
Fault Tolerance Protocols for Parallel Programs Based on Tasks Replication / J. Aguilar ; M. Hernandez
Thin, High Performance Computing over the Internet / Terry Keeley ; Vice President ; Sun Microsystems
Network Modeling and Simulation 2
BLLB: A Novel Traffic Policing Mechanism for ATM Networks / M. Salamah ; H. Lababidi
Performance Analysis of an N[times]N ATM Switch with Markov Modulated Poisson Process under Back-Pressure Mechanism / M. Escheikh ; K. Barkaoui ; A. Bouallegue
The Design of ATM Virtual Path Connection Networks with Service Separation / A. Arvidsson ; J. de Kock ; A. Krzesinski ; P. Taylor
Modeling and Analysis of UMTS Hierarchical Networks / F. Quessette ; A. Troubnikoff ; F. Valois
QoS Modeling and Simulation
An Integrative Scheme of Differentiated Services: Modeling and Performance Analysis / C. Lin ; L. Sheng ; M. Xu
On a Novel Framework for Optimizing QoS of Long Range Dependence Traffic in ATM / A. Bhargava ; D. Agrawal
Network Path Pricing: A QoS-Based Model / R. Simon ; W. Chang ; B. Jukic
Statistical Traffic Modeling for Network Intrusion Detection / J. Cabrera ; B. Ravichandran ; R. Mehra
Performance Evaluation of WWW 2
An Optimal Distributed Call Admission Control for Adaptive Multimedia in Wireless/Mobile Networks / Y. Xiao ; P. Chen ; Y. Wang
Stochastic Simulations of Rejected World Wide Web Pages / G. Meghabghab
Optimizing a "Content-Aware" Load Balancing Strategy for Shared Web Hosting Service / L. Cherkasova ; S. Ponnekanti
Predictive Admission Control Strategy for Overloaded Commercial Web Server / P. Phaal
Scaling for E-Business / Daniel Menasce
Communication Systems 2
A Comparison of Three Protocols for Entry Consistency Maintenance Based on MVA Algorithm
Stateless Routing in Network Simulations / G. Riley ; M. Ammar ; R. Fujimoto
A Cost-Effective Load Balanced Adaptive Routing Scheme for Mesh-Connected Networks / X. Liu ; S. Zhang ; T. Li
Cache Resident Data Locality Analysis / Q. Samdani ; M. Thornton
Modeling and Simulation Techniques 2
An Approach to On-Line Predictive Detection / F. Zhang
Improving Small Job Response Time for Opportunistic Scheduling / G. Ghare ; S. Leutenegger
Performance Evaluation of Java RMI: A Distributed Object Architecture for Internet Based Applications / S. Ahuja ; R. Quintao
Modeling and Evaluation of Redesigning Methodologies for Distributed Workflows / V. Atluri ; R. Mukkamala
Optimization of E-Service Solutions with the Systems of Servers Library / V. Kotov ; H. Trinks
Message from the General Chair
Message from the Program Chairs
Organizing Committee
27.

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図書
sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; with the support of Rgion Midi-Pyrénees ... [et.al.]
出版情報: Los Alamitos, Cailf. : IEEE Computer Society, c1999  xiii, 420 p. ; 28 cm
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Message from the General Co-Chairs
Message from the Program Chair
Organizing Committee
Program Committee
List of Referees
Keynote Address I
Relaxing Constraints: Thoughts on the Evolution of Computer Architecture / Joel Emer ; Compaq Computer Corporation
System Architecture Tradeoffs / Session 1:
Impact of Chip-Level Integration on Performance of OLTP Workloads / L. Barroso ; K. Gharachorloo ; A. Nowatzyk ; B. Verghese
Toward a Cost-Effective DSM Organization That Exploits Processor-Memory Integration / J. Torrellas ; L. Yang ; A-T. Nguyen
Impact of Heterogeneity on DSM Performance / R. Figueiredo ; J. Fortes
Memory and Cache / Session 2a:
Design of a Parallel Vector Access Unit for SDRAM Memory Systems / B. Mathew ; S. McKee ; J. Carter ; A. Davis
Modified LRU Policies for Improving Second-Level Cache Behavior / W. Wong ; J-L. Baer
eXtended Block Cache / S. Jourdan ; L. Rappoport ; Y. Almog ; M. Erez ; A. Yoaz ; R. Ronen
Networks / Session 2b:
Flit-Reservation Flow Control / L-S. Peh ; W. Dally
Performance Evaluation of Dynamic Reconfiguration in High-Speed Local Area Networks / R. Casado ; A. Bermudez ; F. Quiles ; J. Sanchez ; J. Duato
Investigating QoS Support for Traffic Mixes with the MediaWorm Router / K. Yum ; A. Vaidya ; C. Das ; A. Sivasubramaniam
Multithreading and Microarchitecture / Session 3a:
Quantifying the SMT Layout Overhead--Does SMT Pull Its Weight? / J. Burns ; J-L. Gaudiot
Software-Controlled Multithreading Using Informing Memory Operations / T. Mowry ; S. Ramkissoon
Dynamic Cluster Assignment Mechanisms / R. Canal ; J. Parcerisa ; A. Gonzalez
Shared Memory / Session 3b:
High-Throughput Coherence Controllers / A. Nanda ; M. Michael ; D. Joseph
Coherence Communication Prediction in Shared-Memory Multiprocessors / S. Kaxiras ; C. Young
Improving the Throughput of Synchronization by Insertion of Delays / R. Rajwar ; A. Kagi ; J. Goodman
Panel Session I
Impact of Interconnect on Computer Architecture / Bill Dally
Keynote Address II
2K Papers on Caches by Y2K: Do We Need More? / Jean-Loup Baer
Software Techniques / Session 4:
On the Performance of Hand vs. Automatically Optimized Numerical Codes / M. Jimenez ; J. Llaberia ; A. Fernandez
Cache-Efficient Matrix Transposition / S. Chatterjee ; S. Sen
A Prefetching Technique for Irregular Accesses to Linked Data Structures / M. Karlsson ; F. Dahlgren ; P. Stenstrom
Reducing Code Size with Run-Time Decompression / C. Lefurgy ; E. Piccininni ; T. Mudge
Prediction I / Session 5a:
Decoupled Value Prediction on Trace Processors / S-J. Lee ; Y. Wang ; P-C. Yew
Branch Transition Rate: A New Metric for Improved Branch Classification Analysis / M. Haungs ; P. Sallee ; M. Farrens
Combining Static and Dynamic Branch Prediction to Reduce Destructive Aliasing / H. Patil ; J. Emer
Parallel Systems / Session 5b:
The Effect of Network Total Order, Broadcast, and Remote-Write Capability on Network-Based Shared Memory Computing / R. Stets ; S. Dwarkadas ; L. Kontothanassis ; U. Rencuzogullari ; M. Scott
PowerMANNA: A Parallel Architecture Based on the PowerPC MPC620 / P. Behr ; S. Pletner ; A. Sodan
A DSM Architecture for a Parallel Computer Cenju-4 / T. Hosomi ; Y. Kanoh ; M. Nakamura ; T. Hirose
Prediction II / Session 6a:
Memory Dependence Speculation Tradeoffs in Centralized, Continuous-Window Superscalar Processors / A. Moshovos ; G. Sohi
A Technique for High Bandwidth and Deterministic Low Latency Load/Store Accesses to Multiple Cache Banks / H. Neefs ; H. Vandierendonck ; K. De Bosschere
Trace Cache Redundancy: Red and Blue Traces / A. Ramirez ; J. Larriba-Pey ; M. Valero
Parallel Systems Performance / Session 6b:
Evaluation of Active Disks for Decision Support Databases / M. Uysal ; A. Acharya ; J. Saltz
Investigating the Performance of Two Programming Models for Clusters of SMP PCs / F. Cappello ; O. Richard ; D. Etiemble
Performance Analysis and Visualization of Parallel Systems Using SimOS and Rivet: A Case Study / R. Bosch ; C. Stolte ; G. Stoll ; M. Rosenblum ; P. Hanrahan
Special Session
Work-in-progress / Sally McKee
Keynote Address III
Networking at Home--Directions in Connected Computing for the Consumer / Kevin Kahn
Novel Architecture Issues / Session 7:
Register Organization for Media Processing / S. Rixner ; B. Khailany ; P. Mattson ; U. Kapasi ; J. Owens
Architectural Issues in Java Runtime Systems / R. Radhakrishnan ; N. Vijaykrishnan ; L. John
The Best Distribution for a Parallel OpenGL 3D Engine with Texture Caches / A. Vartanian ; J-L. Bechennec ; N. Drach-Temam
Cache Memory Design for Network Processors / T-C. Chiueh ; P. Pradhan
Workshop Overviews
4th Workshop on Communication, Architecture, and Applications for Network-Based Parallel Computing (CANPC)
4th Workshop on Interaction between Compilers and Computer Architectures (INTERACT)
4th Workshop on Multithreaded Execution, Architecture, and Compilation (MTEAC)
2nd Workshop on Parallel Computing for Irregular Applications (WPCIA2)
3rd Workshop on Computer Architecture Evaluation Using Commercial Workloads (CAECW)
Tutorial on Performance Modeling Using Hardware Counters
Author Index
Message from the General Co-Chairs
Message from the Program Chair
Organizing Committee
28.

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図書
sponsored by the IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Cailf. : IEEE Computer Society Press, c2001  xvi, 318 p. ; 28 cm
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Message from the Chairs
Organizing Committee
Program Committee
Reviewers
Microarchitecture I
Stack Value File: Custom Microarchitecture for the Stack / H.-H. S. Lee ; M. Smelyanskiy ; C. J. Newburn ; G. S. Tyson
Register Renaming and Scheduling for Dynamic Execution of Predicated Code / P. H. Wang ; H. Wang ; R. M. Kling ; K. Ramakrishnan ; J. P. Shen
Data-Flow Prescheduling for Large Instruction Windows in Out-of-Order Processors / P. Michaud ; A. Seznec
Speculative Data-Driven Multithreading / A. Roth ; G. S. Sohi
Memory Architectures
Towards Virtually-Addressed Memory Hierarchies / X. Qiu ; M. Dubois
Reevaluating Online Superpage Promotion with Hardware Support / Z. Fang ; L. Zhang ; J. B. Carter ; W. C. Hsieh ; S. A. McKee
Performance of Hardware Compressed Main Memory / B. Abali ; H. Franke ; X. Shen ; D. E. Poff ; T. B. Smith
Multiprocessor Systems
JETTY: Filtering Snoops for Reduced Energy Consumption in SMP Servers / A. Moshovos ; G. Memik ; B. Falsafi ; A. Choudhary
A New Scalable Directory Architecture for Large-Scale Multiprocessors / M. E. Acacio ; J. Gonzalez ; J. M. Garcia ; J. Duato
Self-Tuned Congestion Control for Multiprocessor Networks / M. Thottethodi ; A. R. Lebeck ; S. S. Mukherjee
Code Generation Techniques
Automatically Mapping Code on an Intelligent Memory Architecture / J. Lee ; Y. Solihin ; J. Torrellas
CARS: A New Code Generation Framework for Clustered ILP Processors / K. Kailas ; K. Ebcioglu ; A. Agrawala
Energy and Thermal Management
An Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches / S.-H. Yang ; M. D. Powell ; K. Roy ; T. N. Vijaykumar
DRAM Energy Management Using Software and Hardware Directed Power Mode Control / V. Delaluz ; M. Kandemir ; N. Vijaykrishnan ; A. Sivasubramaniam ; M. J. Irwin
Dynamic Thermal Management for High-Performance Microprocessors / D. Brooks ; M. Martonosi
Prediction Techniques
Dynamic Prediction of Critical Path Instructions / E. Tune ; D. Liang ; D. M. Tullsen ; B. Calder
Dynamic Branch Prediction with Perceptrons / D. A. Jimenez ; C. Lin
Differential FCM: Increasing Value Prediction Accuracy by Improving Table Usage Efficiency / B. Goeman ; H. Vandierendonck ; K. De Bosschere
Application-Specific Designs
DLP + TLP Processors for the Next Generation of Media Workloads / J. Corbal ; R. Espasa ; M. Valero
An Architectural Evaluation of Java TPC-W / H. W. Cain ; R. Rajwar ; M. Marden ; M. H. Lipasti
A Programmable Co-Processor for Profiling / C. B. Zilles
Performance Modeling and Analysis
A Delay Model and Speculative Architecture for Pipelined Routers / L.-S. Peh ; W. J. Dally
Quantifying the Impact of Architectural Scaling on Communication / T. Heath ; S. Kaur ; R. P. Martin ; T. D. Nguyen
Latency Tolerance Techniques
Call Graph Prefetching for Database Applications / M. Annavaram ; J. M. Patel ; E. S. Davidson
Branch History Guided Instruction Prefetching / V. Srinivasan ; M. J. Charney ; T. R. Puzak
Reducing DRAM Latencies with an Integrated Memory Hierarchy Design / W. Lin ; S. K. Reinhardt ; D. Burger
Workshops
Interact-V: Workshop on Interaction between Compilers and Computer Architectures / G. Lee ; P.-C. Yew
Fourth Workshop on Computer Architecture Evaluation using Commercial Workloads / A. Nanda ; R. Clapp
Workshop on Microprocessors for Networks and Communications / I. Spillinger ; M. Nemirovsky
Tutorials
VIA and InfiniBand Communication Architecture / D. K. Panda
Power-Performance Modeling, Analyis and Validation / P. Bose
Author Index
Message from the Chairs
Organizing Committee
Program Committee
29.

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図書
sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; edited by Brad L. Hutchings
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c2000  x, 348 p. ; 28 cm
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Conference Organizers
Architecture / Andre DeHonSession 1:
Design of a VLIW Compute Accelerator on the Transmogrifier-2 / L. Zhang ; Q. Wang ; D. Lewis
A Scalable, Loadable Custom Programmable Logic Device for Solving Boolean Satisfiability Problems / M. Boyd ; T. Larrabee
Configuration Caching Management Techniques for Reconfigurable Computing / Z. Li ; K. Compton ; S. Hauck
Compilation 1 / Wayne LukSession 2:
A Matlab Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems / P. Banerjee ; N. Shenoy ; A. Choudhary ; C. Bachmann ; M. Haldar ; P. Joisha ; A. Jones ; A. Kanhare ; A. Nayak ; S. Periyacheri ; M. Walkden ; D. Zaretsky
Stream-Oriented FPGA Computing in the Streams-C High Level Language / M. Gokhale ; J. Stone ; J. Arnold ; M. Kalinowski
Applications 1 / Philip FreidenSession 3:
A Reconfigurable Computing Architecture for Microsensors / S. Scalera ; M. Falco ; B. Nelson
FPGA Implementation of a Microcoded Elliptic Curve Cryptographic Processor / K. Leung ; K. Ma ; W. Wong ; P. Leong
Customizing Graphics Applications: Techniques and Programming Interface / H. Styles ; W. Luk
Compilation 2 / Scott HauckSession 4:
Automatic Synthesis of Data Storage and Control Structures for FPGA-Based Computing Engines / P. Diniz ; J. Park
A C to HDL Compiler for Pipeline Processing on FPGAs / T. Maruyama ; T. Hoshino
Cryptographic Applications / John McHenrySession 5:
High Performance DES Encryption in Virtex FPGAs Using Jbits / C. Patterson
A Bit-Serial Implementation of the International Data Encryption Algorithm IDEA / M. Leong O. Cheung ; K. Tsoi
An Adaptive Cryptographic Engine for IPSec Architectures / A. Dandalis ; V. Prasanna ; J. Rolim
Programming Tools / Brad HutchingsSession 6:
Death of the RLOC? / S. Singh
Automated Extraction of Run-Time Parameterizable Cores from Programmable Device Configurations / P. James-Roxby ; S. Guccione
Fault Tolerance / Philip KuekesSession 7:
Dynamic Fault Tolerance in FPGAs via Partial Reconfiguration / J. Emmert ; C. Stroud ; B. Skaggs ; M. Abramovici
An ACS Robotic Control Algorithm with Fault Tolerant Capabilities / S-Y. Yu ; N. Saxena ; E. McCluskey
Tunable Fault Tolerance for Runtime Reconfigurable Architectures / S. Sinha ; P. Kamarchik ; S. Goldstein
Wireless Applications / Tom KeanSession 8:
Synchronization in Software Radios--Carrier and Timing Recovery Using FPGAs / C. Dick ; F. Harris ; M. Rice
Architecture and Application of a Dynamically Reconfigurable Hardware Array for Future Mobile Communication Systems / A. Alsolaim ; J. Becker ; M. Glesner ; J. Starzyk
Applications 2 / Mike ButtsSession 9:
Implementation of Near Shannon Limit Error-Correcting Codes Using Reconfigurable Hardware / B. Levine ; R. Taylor ; H. Schmit
Hardware-Software Codesign and Parallel Implementation of a Golomb Ruler Derivation Engine / E. Sotiriades ; A. Dollas ; P. Athanas
An FPGA-Based Coprocessor for the Parsing of Context-Free Grammars / C. Ciressan ; E. Sanchez ; M. Rajman ; J-C. Chappelier
Applications 3 / Don BouldinSession 10:
A Reliable LZ Data Compressor on Reconfigurable Coprocessors / W-J. Huang
Evidence: An FPGA-Based System for Photon EVent IDENtification and CEntroiding / M. Alderighi ; S. D'Angelo ; G. Sechi
Improving the Performance and Efficiency of an Adaptive Amplification Operation Using Configurable Hardware / M. Wirthlin ; S. Morrison ; P. Graham ; B. Bray
Poster Session 1
Configuration Relocation and Defragmentation for Reconfigurable Computing / J. Cooley ; S. Knol
Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW / T. Yamauchi ; S. Nakaya ; T. Inuo ; N. Kajihara
Hardware Accelerator for Subgraph Isomorphism Problems / S. Ichikawa ; L. Udorn ; K. Konishi
A Reconfigurable Hardware Platform for Digital Real-Time Signal Processing in Television Studios / K. Henriss ; P. Ruffer ; R. Ernst ; S. Hasenzahl
Reconfigurable Array Media Processor (RAMP) / K. Rath ; S. Tangirala ; P. Friel ; P. Bolsara ; J. Flores ; J. Wadley
Internet Connected FPGAs / H. Fallside ; M. Smith
A Reconfigurable Stochastic Model Simulator for analysis of parallel systems / O. Yamamoto ; Y. Shibata ; H. Kurosawa ; H. Amano
Poster Session 2
A Virtual Hardware System on a Dynamically Reconfigurable Logic Device / M. Uno ; K. Furuta ; T. Fujii ; M. Motomura
Optimal vs. Heuristic Approaches to Context Scheduling for Multi-Context Reconfigurable Architectures / R. Maestre ; F. Kurdahi ; M. Fernandez ; R. Hermida ; N. Bagherzadeh ; H. Singh
A Communication Scheduling Algorithm For Multi-FPGA Systems / J. Suh ; D-I. Kang ; S. Crago
Preemptive Multitasking on FPGAs / L. Levinson ; R. Manner ; M. Sessler ; H. Simmler
BigSky--An On-Line Arithmetic Design Tool for FPGAs / A. Schneider ; R. McIlhenny ; M. Ercegovac
Improving the FPGA Design Process through Determining and Applying Logical-to-Physical Design Mappings / B. Hutchings
Multiple Precision for Resource Minimization / G. Constantinides ; P. Cheung
StReAm: Object-Oriented Programming of Stream Architectures Using PAM-Blox / O. Mencer ; H. Hubert ; M. Morf ; M. Flynn
Poster Session 3
An FPGA-Based Array Processor for an Ionospheric-Imaging Radar / T. Tuan ; M. Figueroa ; F. Lind ; X. Zhou ; X. Diorio ; J. Sahr
Embedded Compilation for Multimedia Applications / N. Daw ; D. Strelow
Interfacing Reconfigurable Logic with a CPU / K. Walker ; M. Budiu
A Run-Time Reconfigurable Plug-In for the Winamp MP3 Player / J. Scalera ; M. Jones
Accelerating Embedded Applications Using Dynamically Reconfigurable Hardware and Evolutionary Algorithms / J. Harkin ; T. McGinnity ; L. Maguire
Implementation of a Configurable Controller for an AC Drive Control: A Case Study / M. Imecs ; P. Bikfalvi ; S. Nedevschi ; J. Vasarhelyi
Pattern Recognition and Reconstruction on an FPGA Coprocessor Board
Poster Session 4
FCCMs and the Memory Wall / S. Derrien ; S. Rajopadhye
A C to Hardware/Software Compiler / K. Bazargan ; R. Kastner ; S. Ogrenci ; M. Sarrafzadeh
Evaluating Hardware Compilation Techniques / M. Weinhardt
Adapting Constant Multipliers in a Neural Network Implementation / B. Blodget
A Networked FPGA-Based Hardware Implementation of a Neural Network Application / H. Restrepo ; R. Hoffmann ; A. Perez-Uribe ; C. Teuscher
Design of C++ Class Library and Bit-Serial Compiler for Variable-Precision Datapath Synthesis on Adaptive Computing Systems / K. Suzuki ; M. Wang ; F. Zhao ; W. Dai
An Investigation of Reconfigurable Multipliers for Use in Adaptive Signal Processing / T. Courtney ; R. Turner ; R. Woods
Combining Serialization and Reconfiguration for Convolver Designs / A. Derbyshire
Author Index
Conference Organizers
Architecture / Andre DeHonSession 1:
Design of a VLIW Compute Accelerator on the Transmogrifier-2 / L. Zhang ; Q. Wang ; D. Lewis
30.

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sponsored by IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Cailf : IEEE Computer Society Press, c1999  xiii, 324 p. ; 28 cm
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sponsored by IEEE Computer Society TCCA, ACM SIGARCH ; with support from The Georgia Institute of Technology
出版情報: Los Alamitos, CA : IEEE Computer Society, c1999  xii, 317 p. ; 28 cm
シリーズ名: Computer architecture news ; vol. 27, no. 2 May 1999 special issue
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sponsored by IEEE Technical Committee on Computer Architecture, IEEE Technical Committee on Parallel Processing ; in cooperation with ACM SIGARCH, IBM, Intel, SGI
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2000  xi, 309 p. ; 28 cm
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Introduction
Organizing Committee
Program Committee
Reviewers
Keynote
"New Challenges in Microarchitecture and Compiler Design" / Fred Pollack
Register Allocation and Analysis
Register Queues: A New Hardware/Software Approach To Efficient Software Pipelining / M. Smelyanskiy ; G. Tyson ; E. Davidson
Global Register Partitioning / J. Hiser ; S. Carr ; P. Sweany
Region Formation Analysis with Demand-Driven Inlining for Region-Based Optimization / T. Way ; B. Breech ; L. Pollock
Architectural Design
aSOC: A Scalable, Single-Chip Communications Architecture / J. Liang ; S. Swaminathan ; R. Tessier
Address Partitioning in DSM Clusters with Parallel Coherence Controllers / I. Pragaspathy ; B. Falsafi
Custom Wide Counterflow Pipelines for High-Performance Embedded Applications / B. Childers ; J. Davidson
Optimizations and Opportunities
A Lightweight Algorithm for Dynamic If-Conversion during Dynamic Optimization / K. Hazelwood ; T. Conte
Exploring the Limits of Sub-Word Level Parallelism / K. Scott
The Dynamic Trace Memoization Reuse Technique / A. da Costa ; F. Franca ; E. Filho
Exploring Sub-Block Value Reuse for Superscalar Processors / J. Huang ; D. Lilja
"Dynamic Optimization: An Online Opportunity" / Michael Smith
High Performance Memory Techniques
Hiding Relaxed Memory Consistency with Compilers / J. Lee ; D. Padua
Neighborhood Prefetching on Multiprocessors Using Instruction History / D. Koppelman
Characterization of Silent Stores / G. Bell ; K. Lepak ; M. Lipasti
Speculation and Prediction
On Some Implementation Issues for Value Prediction on Wide-Issue ILP Processors / S-J. Lee ; P-C. Yew
A Unified Compiler Framework for Control and Data Speculation / R. Ju ; K. Nomura ; U. Mahadevan ; L-C. Wu
Applying Data Speculation in Modulo Scheduled Loops / R. Hank
Branch Prediction
Branch Prediction in Multi-Threaded Processors / J. Gummaraju ; M. Franklin
The Effect of Code Reordering on Branch Prediction / A. Ramirez ; J. Larriba-Pey ; M. Valero
A Taxonomy of Branch Mispredictions, and Alloyed Prediction as a Robust Solution to Wrong-History Mispredictions / K. Skadron ; M. Martonosi ; D. Clark
Dynamic Branch Prediction for a VLIW Processor / J. Hoogerbrugge
"Blue Gene" / Monty Denneau
Parallel Computation
Fine Grained Multithreading with Process Calculi / L. Lopes ; F. Silva ; V. Vasconcelos
Data Relation Vectors: A New Abstraction for Data Optimizations / M. Kandemir ; J. Ramanujam
Combined Selection of Tile Sizes and Unroll Factors Using Iterative Compilation / T. Kisuki ; P. Knijnenburg ; M. O'Boyle
Applications
Faster FFTs via Architecture-Cognizance / K. Gatlin ; L. Carter
Hybrid Parallel Circuit Simulation Approaches / E. Naroska ; R-J. Shang ; F. Lai ; U. Schwiegelshohn
Multithreaded Programming of PC Clusters / M. Schulz
Instruction Scheduling
A Fast Algorithm for Scheduling Instructions with Deadline Constraints on RISC Processors / H. Wu ; J. Jaffar ; R. Yap
Instruction Scheduling for Clustered VLIW DSPs / R. Leupers
Efficient Backtracking Instruction Schedulers / S. Abraham ; W. Meleis ; I. Baev
Author Index
Introduction
Organizing Committee
Program Committee
33.

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[edited by Jeffrey Arnold and Kenneth L. Pocek] ; sponsored by IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2003  x, 312 p. ; 28 cm
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Conference Organizers
Applications / Session 1:
A High I/O Reconfigurable Crossbar Switch / S. Young ; P. Alfke ; C. Fewer ; S. McMillan ; B. Blodget ; D. Levi
Congruential Sieves on a Reconfigurable Computer / H. A. Wake ; D. A. Buell
Performance Analysis of Fixed, Reconfigurable, and Custom Architectures for the SCAN Image and Video Encryption Algorithm / A. Dollas ; C. Kachris ; N. Bourbakis
Network Security / Session 2:
Implementation of a Content-Scanning Module for an Internet Firewall / J. Moscola ; J. Lockwood ; R. P. Loui ; M. Pachos
Compiling Policy Descriptions into Reconfigurable Firewall Processors / T. K. Lee ; S. Yusuf ; W. Luk ; M. Sloman ; E. Lupu ; N. Dulay
Communication Techniques / Session 3:
Compact FPGA-Based True and Pseudo Random Number Generators / K. H. Tsoi ; K. H. Leung ; P. H. W. Leong
Accelerating Bit Error Rate Testing Using a System Level Design Tool / V. Singh ; A. Root ; E. Hemphill ; N. Shirazi ; J. Hwang
A Hardware Gaussian Noise Generator for Channel Code Evaluation / D.-U Lee ; J. Villasenor ; P. Y. K. Cheung
Arithmetic / Session 4:
Perturbation Analysis for Word-Length Optimization / G. A. Constantinides
Improved Small Multiplier Based Multiplication, Squaring and Division / B. R. Lee ; N. Burgess
Device Architecture / Session 5:
Efficient Application Representation for HASTE: Hybrid Architectures with a Single, Transformable Executable / B. A. Levine ; H. H. Schmit
Issues and Approaches to Coarse-Grain Reconfigurable Architecture Development / K. Eguro ; S. Hauck
Asynchronous PipeRench: Architecture and Performance Estimations / H. Kagotani ; H. Schmit
Fault Modeling and Recovery / Session 6:
The Reliability of FPGA Circuit Designs in the Presence of Radiation Induced Configuration Upsets / M. Wirthlin ; E. Johnson ; N. Rollins ; M. Caffrey ; P. Graham
Adaptive Fault Recovery for Networked Reconfigurable Systems / W. Xu ; R. Ramanarayanan ; R. Tessier
Gamma-Ray Pulsar Detection Using Reconfigurable Computing Hardware / J. Frigo ; D. Palmer ; M. Gokhale ; M. Popkin-PaineSession 7:
Design and Implementation of a Generic 2-D Orthogonal Discrete Wavelet Transform on EPGA / A. Benkrid ; K. Benkrid ; D. Crookes
Runtime Assignment of Reconfigurable Hardware Components for Image Processing Pipelines / H. Quinn ; L. A. Smith King ; M. Leeser ; W. Meleis
Floating Point Unit Generation and Evaluation for FPGAs / J. Liang ; O. MencerSession 8:
Tradeoffs of Designing Floating-Point Division and Square Root on Virtex FPGAs / X. Wang ; B. E. Nelson
Programming Frameworks / Session 9:
Data Search and Reorganization Using FPGAs: Application to Spatial Pointer-Based Data Structures / P. C. Diniz ; J. Park
Simulation and Synthesis of CSP-Based Interprocess Communication / P. A. Jackson ; B. L. Hutchings ; J. L. Tripp
Source Level Debugger for the Sea Cucumber Synthesizing Compiler / K. S. Hemmert
Compilation Techniques / Session 10:
Performance Modeling of Reconfigurable SoC Architectures and Energy-Efficient Mapping of a Class of Applications / J. Ou ; S. Choi ; V. K. Prasanna
Reconfigurable Computing Application Frameworks / A. L. Slade
Posters
Automatic Conversion of Floating Point MATLAB Programs into Fixed Point FPGA Based Hardware Design / P. Banerjee ; D. Bagchi ; M. Haldar ; A. Nayak ; V. Kim ; R. Uribe
Fast Reconfiguration through Difference Compression / I. Kennedy
FPGA-Based SIMD Processor / S. Y. C. Li ; G. C. K. Cheuk ; K. H. Lee
Implementation of Three-Dimensional FPGA-Based FDTD Solvers: An Architectural Overview / J. P. Durbano ; F. E. Ortiz ; J. R. Humphrey ; D. W. Prather ; M. S. Mirotznik
A Pipelined SoPC Architecture for 2.5 Gbps Network Processing / C. Toal ; S. Sezer ; X. Yu
A Novel FIR Filter Architecture for Efficient Signal Boundary Handling on Xilinx VIRTEX FPGAs
Reconfigurable High Resolution Network Camera / A. Filippov
Application of Task Concurrency Management on Dynamically Reconfigurable Hardware Platforms / J. Resano ; D. Verkest ; D. Mozos ; S. Vernalde ; F. Catthoor
A Logic Based Hardware Development Environment / S. Belkacemi
Standarizing the Performance Assessment of Reconfigurable Processor Architectures / L. Shannon ; P. Chow
An Automated and Power-Aware Framework for Utilization of IP Cores in Hardware Generated from C Descriptions Targeting FPGAs / A. Jones
A Configurable Network Protocol for Cluster Based Communications Using Modular Hardware Primitives on an Intelligent NIC / R. G. Jaganathan ; K. D. Underwood ; R. Sass
Fabric-Based Systems: Model, Tools, Applications / C. Wolinski ; K. McCabe
An Estimation and Simulation Framework for Energy Efficient Design Using Platform FPGAs / S. Mohanty
Exploiting Reconfigurable Hardware for Network Security / S. Li ; J. Torresen ; O. Sorassen
A Second Generation Embedded Reconfigurable Input Device for Kinetically Challenged Persons / K. Papademetriou ; S. Sotiropoulos
Performance and Area Modeling of Complete FPGA Designs in the Presence of Loop Transformations / K. R. Shesha Shayee
Synthesis and Estimation of Memory Interfaces for FPGA-Based Reconfigurable Computing Engines
Linear Placement for Static/Dynamic Reconfiguration in JBits / V. Krishna Marreddy ; S. Noorbaloochi ; K. Bazargan
Real-Time Extensions to a C-Like Hardware Description Language / T. Todman
RSA Encryption Using Extended Modular Arithmetic on the Quicksilver COSM Adaptive Computing Machine / K. Puttegowda ; P. Athanas
Kernel Formation in Garpcc / T. Callahan
Author Index
Conference Organizers
Applications / Session 1:
A High I/O Reconfigurable Crossbar Switch / S. Young ; P. Alfke ; C. Fewer ; S. McMillan ; B. Blodget ; D. Levi
34.

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図書
edited by Stephen J. Turner and Simon J.E. Taylor ; sponsored by IEEE Computer Society Technical Committee on Parallel Processing, IEEE Computer Society Technical Committee on Simulation, IEEE Computer Society Technical Committee on Computer Architecture ; supported by ACM SIGSIM University of Delft, the Netherlands
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2003  xi, 203 p. ; 28 cm
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Message from the General and Program Chairs
Organizing Committee
Reviewers
Keynote Speaker / Session 1:
Distributed Simulation and Simulation Practice / S. Robinson
HLA and Grid Issues / Session 2:
Towards a Grid Management System for HLA-Based Interactive Simulations / K. Zajac ; M. Bubak ; M. Malawski ; P. Sloot
A Framework for Executing Parallel Simulation Using RTI / Z. Yuan ; W. Cai ; M. Low
Interest Management in Agent-Based Distributed Simulations / L. Wang ; S. Turner ; F. Wang
Real Time Systems / Session 3:
Enabling Real-Time Distributed Virtual Simulation over the Internet Using Host-Based Overlay Multicast / D. Moen ; J. Pullen
Heterogeneous Architecture and Testbed for Simulation of Large-Scale Real-Time Systems / M. Mathure ; V. Jonnalagadda ; J. Zalewski
Adaptive Scheduling Techniques for Multimedia Computing in Hard Real-Time Systems / J. Kim ; N. Kim ; B. Lee
Real Time Inspection of Hidden Worlds / A. Ferscha ; M. Keller
Model Composition / Session 4:
Automatic SOM Compatibility Check and FOM Development / Y. Hu ; G. Tan ; F. Moradi
An Agent Architecture for Network Support of Distributed Simulation Systems / R. Simon ; W. Chang
An XML Description Language for Web-Based Network Simulation / R. Canonico ; D. Emma ; G. Ventre
Quality of Service and Multimedia / Session 5:
Model Based Network Emulation to Study the Behavior and Quality of Real-Time Applications / C. Scherpe ; B. Wolfinger ; I. Salzmann
Performance Evaluation of the Managed Bandwidth Service with QoS Guarantees / C. Bouras ; V. Kapoulas ; D. Primpas
Peer-to-Peer Suitability for Collaborative Multiplayer Games / A. El Saddik ; A. Dufour
Parallel and Distributed Simulation / Session 6:
An Event-Synchronization Protocol for Parallel Simulation of Large-Scale Wireless Networks / C. Kelly ; R. Manohar
PCI-DMA/CPU Handoff for Increased Effectiveness of Checkpointing Functionalities in CCL / A. Santoro ; F. Quaglia
Time Warp Cancellation Optimizations on High Latency Networks / K. Iskra ; G. van Albada
Methodology and Web-Based Simulation / Session 7:
Executing a Minimum Number of Replications to Support the Reliability of FRTS Predictions / D. Anagnostopoulos ; M. Nikolaidou
Statistical Methodology for Web-Based Simulation / W. Biles ; J. Kleijnen
Implementation of a Collaborative Web-Based Simulation Modeling Environment / Y. Wang ; Y. Liao
An Open Interface for Parallelization of Traffic Simulation / D. Igbe ; N. Kalantery ; S. Ijaha ; S. Winter
Panel on Distributed Simulation Project Management / Session 8:
Critical Issues on Distributed Simulation Project Management
Distributed Stiffness / P. SharkeySession 9:
Haptic Audio Visual Collaborative Virtual Environments and Applications / Session 10:
Shared Simple Virtual Environment: An Object-Oriented Framework for Highly-Interactive Group Collaboration / J. Linebarger ; C. Janneck ; G. Kessler
Haptic Virtual Environment Performance over IP Networks: A Case Study / R. Souayed ; W. Yu ; Q. Gu ; D. Gaiti ; G. Pujolle ; A. Marshall
An Auto-Calibrated Laser-Pointing Interface for Large Screen Displays / D. Laberge ; J. Lapointe ; E. Petriu
Importance of Communication Influences on a Highly Collaborative Task / O. Otto ; D. Roberts
Author Index
Message from the General and Program Chairs
Organizing Committee
Reviewers
35.

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図書
edited by A. Boukerche, S. K. Das, and S. Majumdar ; sponsored by IEEE Computer Society Technical Committee on Computer Architecture, IEEE Computer Society Technical Committee on Simulation ; in cooperation with ACM SIGSIM, ACM SIGARCH ; supported by University of North Texas, University of Texas at Arlington
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2002  xvi, 521 p. ; 28 cm
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sponsored by IEEE Computer Society Technical Committee on Parallel Processing ; in cooperation with IEEE Computer Society Technical Committee on Computer Architecture, IEEE Computer Society Technical Committee on Distributed Processing, ACM SIGARCH
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2004  lvi, 289 p. ; 28 cm.
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Heterogeneous Computing Workshop--HCW / Workshop 1:
Workshop Introduction
Message from the Steering Committee Chair
Message from the General Chair
Message from the Program Chair
IQ-Services: Resource-Aware Middleware for Heterogeneous Applications / Z. Cai ; G. Eisenhauer ; C. Poellabauer ; K. Schwan ; M. Wolf
Data Partitioning with a Realistic Performance Model of Networks of Heterogeneous Computers / A. Lastovetsky ; R. Reddy
Multisite Resource Selection and Scheduling Algorithm on Computational Grid / W. Zhang ; B. Fang ; H. He ; H. Zhang ; M. Hu
An Execution-Time Estimation Model for Heterogeneous Clusters / Y. Kishimoto ; S. Ichikawa
A Comparison of Static QoS-Based Scheduling Heuristics for a Meta-Task with Multiple QoS Dimensions in Heterogeneous Computing / K. Golconda ; F. Ozguner ; A. Dogan
Capabilities-Based Query Planning in Mediator Systems / J. Tang ; J. Song ; W. Xiao
A High Performance, Low Complexity Algorithm for Compile-Time Task Scheduling in Heterogeneous Systems / T. Hagras ; J. Janecek
Metainformation and Workflow Management for Solving Complex Problems in Grid Environments / H. Yu ; X. Bai ; G. Wang ; Y. Ji ; D. Marinescu
Evaluation of an Unfair Decider Mechanism for the Self-Tuning dynP Job Scheduler / A. Streit
A Framework for Heterogeneous Middleware Security / S. Foley ; T. Quillinan ; M. O'Connor ; B. Mulcahy ; J. Morrison
Improving Performance of Java Applications Using a Coprocessor / F. Li ; M. Kandemir
Automatic Deployment for Hierarchical Network Enabled Servers / E. Caron ; P. Chouhan ; A. Legrand
Static Mapping of Subtasks in a Heterogeneous Ad Hoc Grid Environment / S. Shivle ; r. Castain ; H. Siegel ; A. Maciejewski ; T. Banka ; K. Chindam ; S. Dussinger ; P. Pichumani ; P. Satyasekaran ; W. Saylor ; D. Sendek ; J. Sousa ; J. Sridharan ; P. Sugavanam ; J. Velazco
Performance Improvement in Web Services Invocation Framework / M. Migliardi ; R. Podesta
Application of Lagrangian Receding Horizon Techniques to Resource Management in Ad Hoc Grid Environments / R. Castain
A Hybrid Heuristic for DAG Scheduling on Heterogeneous Systems / R. Sakellariou ; H. Zhao
Parallel Implementation of Strassen's Matrix Multiplication Algorithm for Heterogeneous Clusters / Y. Ohtaki ; D. Takahashi ; T. Boku ; M. Sato
Latency Tolerance through Parallelization of Time in Scientific Applications / A. Srinivasan ; N. Chandra
Performance and Client Heterogeneity in Service-Based Metacomputing / T. Wrzosek ; D. Kurzyniec ; V. Sunderam
Workshop on Parallel and Distributed Real-Time Systems--WPDRTS / Workshop 2:
Resource Management of Highly Configurable Tasks / J. Hansen ; S. Ghosh ; R. Rajkumar ; J. Lehoczky
Quality-Based Adaptive Resource Management Architecture (QARMA): A CORBA Resource Management Service / D. Fleeman ; M. Gillen ; A. Lenharth ; M. Delaney ; L. Welch ; D. Juedes ; C. Liu
Heuristic Resource Allocation Algorithms for Maximizing Allowable Workload in Dynamic, Distributed Real-Time Systems / F. Drews
Robust Partitioning for Reliable Real-Time Systems / R. Seyer ; C. Siemers ; R. Falsett ; K. Ecker ; H. Richter
Iterative Integer Programming Formuation for Robust Resource Allocation in Dynamic Real-Time Systems / S. Gertphol ; V. Prasanna
Time-sensitive Computation of Aggregate Functions over Distributed Imprecise Data / Q. Han ; M. Nguyen ; S. Irani ; N. Venkatasubramanian
Pfair Scheduling of Periodic Tasks with Allocation Constraints on Multiple Processors / D. Liu ; Y. Lee
Improved Conditions for Bounded Tardiness under EPDF Fair Multiprocessor Scheduling / U. Devi ; J. Anderson
Group Scheduling in Systems Software / M. Frisbie ; D. Niehaus ; V. Subramonian ; C. Gill
Cost Efficient Synthesis of Real-Time Systems upon Heterogeneous Multiprocessor Platforms / S. Baruah
Synthesis of Pipelined Systems for the Contemporaneous Execution of Periodic and Aperiodic Tasks with Hard Real-Time Constraints / P. Palazzari ; L. Baldini ; M. Coli
Design of a Real-Time CORBA Event Service Customised for the CAN Bus / R. Finocchiaro ; S. Lankes ; A. Jabs
Message Routing in Multi-segment FTT Networks: The Isochronous Approach / P. Pedreiras ; L. Almeida
Software Organization to Facilitate Dynamic Processor Scheduling / R. Clark ; E. Jensen ; N. Rouquette
Utility-Function Based Resource Allocation for Adaptable Applications in Dynamic, Distributed Real-Time Systems / A. Bruening ; M. Hoefer
Time-Utility Scheduling and Provably Correct Critical Computer-Based Systems / G. Le Lann
On the Joint Utility Accrual Model / H. Wu ; B. Ravindran
CARUSO--An Approach Towards a Network of Low Power Autonomic Systems on Chips for Embedded Real-time Applications / U. Brinkschulte ; T. Ungerer ; J. Becker
Worst Case Execution Time Prediction by Static Program Analysis / C. Ferdinand
On Static WCET Analysis vs. Run-time Monitoring of Execution Time / C. Cavanaugh
Timing Analysis: In Search of Multiple Paradigms / F. Mueller
The Case for Dynamic Real-time Task Timing in Modern Real-Time Systems / S. Brandt
Real-Time Communication for Industrial Embedded Systems Using Switched Ethernet / H. Hoang
Managing Communication in Integrated Modular Architectures / S. Gopalakrishnan
Pulse-modulated Radar Display Processor on a Chip / T. Darwich
Peer-to-Peer Reputations / P. Dewan
A Utility-Based Approach to Scheduling Multimedia Streams in Peer-to-Peer Systems / F. Chen
Increasing Object Availability in Peer-to-Peer Systems / M. Ramanathan
Reconfigurable Architectures Workshop--RAW / Workshop 3:
Of Gates and Wires / P. Lysaght ; D. Levi
A Parallel Architecture for Secure FPGA Symmetric Encryption / E. Swankoski ; R. Brooks ; V. Narayanan ; M. Irwin
Tuning Reconfigurable Microarchitectures for Power Efficiency / A. Dhodapkar ; J. Smith
A Reconfigurable Tag Computation Architecture for Terabit Packet Scheduling / S. Sezer ; C. Toal ; E. Garcia ; V. Stewart
A New Approach for On-line Placement on Reconfigurable Devices / A. Ahmadinia ; C. Bobda ; M. Bednara ; J. Teich
Improving Java Performance Using Dynamic Method Migration on FPGAs / E. Lattanzi ; A. Gayasen ; L. Benini ; A. Bogliolo
An FPGA Run-Time System for Dynamical On-Demand Reconfiguration / M. Ullmann ; M. Huebner ; B. Grimm
Models and Reconfiguration Problems for Multi Task Hyperreconfigurable Architectures / S. Lange ; M. Middendorf
Runtime Reconfigurable Interfaces--The RTR-IFB Approach / S. Ihmor ; W. Hardt
System-Level Parallelism and Throughput Optimization in Designing Reconfigurable Computing Applications / E. El-Araby ; M. Taher ; K. Gaj ; T. El-Ghazawi ; D. Caliga ; N. Alexandridis
Embedded Software Integration for Coarse-grain Reconfigurable Systems / P. Schaumont ; K. Sakiyama ; A. Hodjat ; I. Verbauwhede
An Integrated FPGA Design Framework: Custom Designed FPGA Platform and Application Mapping Toolset Development / V. Kalenteridis ; H. Pournara ; K. Siozios ; K. Tatas ; G. Koytroympezis ; I. Pappas ; S. Nikolaidis ; S. Siskos ; D. Soudris ; A. Thanailakis
Real-time Configuration Code Decompression for Dynamic FPGA Self-Reconfiguration / F. Weissel
Forward-looking Macro Generation and Relational Placement During High Level Synthesis to FPGAs / R. Huang ; R. Vemuri
Integrated Modeling and Generation of a Reconfigurable Network-on-Chip / D. Ching
Dynamic Reconfiguration of Distributed Arithmetic Controllers: Design Space Exploration and Trade-off Analysis / K. Danne
Hardware Assisted Two Dimensional Ultra Fast Placement / M. Handa
System-on-Programmable-Chip Approach Enabling Online Fine-Grained 1D-Placement / H. Kalte ; M. Porrmann ; U. Ruckert
Non-Contiguous Linear Placement for Reconfigurable Fabrics / C. Ababei ; K. Bazargan
Impacting Education Using FPGAs / D. Bouldin
Developing Large-Scale Field-Programmable Analog Arrays / T. Hall ; C. Twigg ; P. Hasler ; D. Anderson
Dynamically Reconfigurable Neuron Architecture for the Implementation of Self-Organizing Learning Array / J. Starzyk ; Y. Guo ; Z. Zhu
Designing a Runtime Reconfigurable Processor for General Purpose Applications / A. Niyonkuru ; H. Zeidler
A Parallel Architecture for Fast Computation of Elliptic Curve Scalar Multiplication over GF(2[superscript m]) / N. Saqib ; F. Rodriguez-Henriquez ; A. Diaz-Perez
Adaptive Processor: A Model of Stream Processing / S. Takano
Probabilistic Analysis of Fault Tolerance of FPGA Switch Block Array / J. Huang ; M. Tahoori ; F. Lombardi
Dynamic Reconfiguration for Management of Radiation-Induced Faults in FPGAs / M. Gokhale ; P. Graham ; E. Johnson ; N. Rollins ; M. Wirthlin
Dynamically Configurable Security for SRAM FPGA Bitstreams / L. Bossuet ; G. Gogniat ; W. Burleson
RECASTER: Synthesis of Fault-Tolerant Embedded Systems Based on Dynamically Reconfigurable FPGAs / C. da Silva ; A. Tokarnia
Adaptive System Architectures / K. Waldschmidt
Implementation of a HiperLAN/2 Receiver on the Reconfigurable Montium Architecture / P. Heysters ; G. Rauwerda ; G. Smit
Mapping of Regular Nested Loop Programs to Coarse-grained Reconfigurable Arrays--Constraints and Methodology / F. Hannig ; H. Dutta
Overlapping Memory Operations with Circuit Evaluation in Reconfigurable Computing / Y. Ben-Asher ; D. Citron ; G. Haber
A High-Performance and Energy-efficient Architecture for Floating-point Based LU Decomposition on FPGAs / G. Govindu ; S. Choi ; V. Daga ; S. Gangadharpalli ; V. Sridhar
Analysis of High-performance Floating-point Arithmetic on FPGAs / L. Zhuo
Synthesizable Reconfigurable Array Targeting Distributed Arithmetic for System-on-Chip Applications / S. Khawam ; T. Arslanm ; F. Westall
Pipelined Multipliers for Reconfigurable Hardware / M. Myjak ; J. Delgado-Frias
Functional Programming for Reconfigurable Computing / A. Strelzoff
A Dynamically-Reconfigurable Image Recognition Processor / K. Maruo ; M. Ichikawa ; N. Miyamoto ; L. Karnan ; T. Yamaguchi ; K. Kotani ; T. Ohmi
MemMap-pd: Performance Driven Technology Mapping Algorithm for FPGAs with Embedded Memory Arrays / M. Kumar ; B. Jayaram ; R. Manimegalai ; V. Kamakoti
Heterogeneous Computing Workshop--HCW / Workshop 1:
Workshop Introduction
Message from the Steering Committee Chair
37.

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図書
IEEE Computer Society Technical Committee on Computer Architecture, ACM SIGARCH
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2003  xi, 448 p. ; 28 cm
シリーズ名: Computer architecture news ; v. 31, no. 2, May 2003
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目次情報: 続きを見る
Symposium Chairman's Welcome
Message from the Program Chair
Committee Members
Thermal and Energy-Aware Microarchitectures / Session 1:
Temperature-Aware Microarchitecture / K. Skadron ; M. Stan ; W. Huang ; S. Velusamy ; K. Sankaranarayanan ; D. Tarjan
Profile-Based Dynamic Voltage and Frequency Scaling for a Multiple Clock Domain Microprocessor / G. Magklis ; M. Scott ; G. Semeraro ; D. Albonesi ; S. Dropsho
Processor Architecture / Session 2:
Half-Price Architecture / I. Kim ; M. Lipasti
Implicitly-Multithreaded Processors / I. Park ; B. Falsafi ; T. Vijaykumar
Panel: Subsetting SPEC When Measuring Results: Valid or Manipulative?
MisSPECulation: Partial and Misleading Use of SPEC CPU2000 in Computer Architecture Conferences / D. Citron
Microarchitecture Techniques / Session 3a:
Banked Multiported Register Files for High-Frequency Superscalar Microprocessors / J. Tseng ; K. Asanovic
Pipeline Damping: A Microarchitectural Technique to Reduce Inductive Noise in Supply Voltage / M. Powell
Smarts: Accelerating Microarchitecture Simulation via Rigorous Statistical Sampling / R. Wunderlich ; T. Wenisch ; J. Hoe
Recovery and Replay / Session 3b:
Transient-Fault Recovery for Chip Multiprocessors / M. Gomaa ; C. Scarbrough ; I. Pomeranz
ReEnact: Using Thread-Level Speculation Mechanisms to Debug Data Races in Multithreaded Codes / M. Prvulovic ; J. Torrellas
A "Flight Data Recorder" for Enabling Full-System Multiprocessor Deterministic Replay / M. Xu ; R. Bodik ; M. Hill
Energy-Saving Designs / Session 4a:
A Highly-Configurable Cache Architecture for Embedded Systems / C. Zhang ; F. Vahid ; W. Najjar
Energy Efficient Co-Adaptive Instruction Fetch and Issue / A. Buyuktosunoglu ; T. Karkhanis ; P. Bose
Positional Adaptation of Processors: Application to Energy Reduction / M. Huang ; J. Renau
DRPM: Dynamic Speed Control for Power Management in Server Class Disks / S. Gurumurthi ; A. Sivasubramaniam ; M. Kandemir ; H. Franke
Interconnects and Multiprocessors / Session 4b:
Token Coherence: Decoupling Performance and Correctness / M. Martin ; D. Wood
GOAL: A Load-Balanced Adaptive Routing Algorithm for Torus Networks / A. Singh ; W. Dally ; A. Gupta ; B. Towles
Using Destination-Set Prediction to Improve the Latency/Bandwidth Tradeoff in Shared-Memory Multiprocessors / P. Harper ; D. Sorin
Performance Analysis of the Alpha 21364-Based HP GS1280 Multiprocessor / Z. Cvetanovic
Front-End Scheduling / Session 5:
Parallelism in the Front-End / P. Oberoi ; G. Sohi
Effective ahead Pipelining of Instruction Block Address Generation / A. Seznec ; A. Fraboulet
Cyclone: A Broadcast-Free Dynamic Instruction Scheduler with Selective Replay / D. Ernst ; A. Hamel ; T. Austin
Clustered Processors / Session 6a:
Improving Dynamic Cluster Assignment for Clustered Trace Cache Processors / R. Bhargava ; L. John
Dynamically Managing the Communication-Parallelism Trade-off in Future Clustered Processors / R. Balasubramonian ; S. Dwarkadas
A Pipelined Memory Architecture for High Throughput Network Processors / T. Sherwood ; G. Varghese ; B. Calder
Efficient Use of Memory Bandwidth to Improve Network Processor Throughput / J. Hasan ; S. Chandra
Prediction / Session 7a:
Improving Branch Prediction by Dynamic Dataflow-Based Identification of Correlated Branches from a Large Global History / R. Thomas ; M. Franklin ; C. Wilkerson ; J. Stark
Detecting Global Stride Locality in Value Streams / H. Zhou ; J. Flanagan ; T. Conte
Phase Tracking and Prediction / S. Sair
Mechanisms and Support / Session 7b:
Virtual Simple Architecture (VISA): Exceeding the Complexity Limit in Safe Real-Time Systems / A. Anantaraman ; K. Seth ; K. Patil ; E. Rotenberg ; F. Mueller
DISE: A Programmable Macro Engine for Customizing Applications / M. Corliss ; E. Lewis ; A. Roth
Building Quantum Wires: The Long and the Short of It / M. Oskin ; F. Chong ; I. Chuang ; J. Kubiatowicz
Memory Issues / Session 8:
Guided Region Prefetching: A Cooperative Hardware/Software Approach / Z. Wang ; D. Burger ; S. Reinhardt ; K. McKinley ; C. Weems
Overcoming the Limitations of Conventional Vector Processors / C. Kozyrakis ; D. Patterson
A Performance Analysis of PIM, Stream Processing, and Tiled Processing on Memory-Intensive Signal Processing Kernels / J. Suh ; E. Kim ; S. Crago ; L. Srinivasan ; M. French
Exploiting Parallelisms / Session 9:
Exploiting ILP, TLP and DLP with the Polymorphous TRIPS Architecture / K. Sankaralingam ; R. Nagarajan ; H. Liu ; C. Kim ; J. Huh ; S. Keckler ; C. Moore
The Jrpm System for Dynamically Parallelizing Java Programs / M. Chen ; K. Olukotun
Author Index
Symposium Chairman's Welcome
Message from the Program Chair
Committee Members
38.

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sponsored by the IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Cailf. : IEEE Computer Society Press, c2003  xiv, 390 p. ; 28 cm
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39.

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sponsored by IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Cailf. : IEEE Computer Society Press, c2002  xiii, 323 p. ; 28 cm
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40.

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sponsored by the IEEE Computer Society, IEEE Computer Society Technical Committee on Computer Architecture, IEEE Computer Society Technical Committee on Simulation
出版情報: Los Alamitos : IEEE Computer Society, c1998  xii, 316 p. ; 28 cm
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41.

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図書
sponsored by The IEEE Computer Society Technical Committee on Computer Architecture, IFIP WG 10.3 (Concurrent Systems), Association for Computing Machinery SIGARCH
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1996  xiv, 304 p. ; 28 cm
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42.

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sponsored by the IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Cailf : IEEE Computer Society Press, c1997  xi, 353 p. ; 28 cm
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43.

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sponsored by ACM SIGARCH, IEEE Computer Society, TCCA
出版情報: New York : ACM Press, c1997  vii, 350 p. ; 28 cm
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44.

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sponsored by the IEEE Computer Society, IEEE Computer Society Technical Committee on Computer Architecture, IEEE Computer Society Technical Committee on Simulation
出版情報: Los Alamitos : IEEE Computer Society Press, c1997  xii, 249 p. ; 28 cm
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45.

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sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; edited by Kenneth L. Pocek and Jeffrey Arnold
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1996  viii, 235 p. ; 28 cm
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46.

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edited by Virginio Cantoni ... [et al.] ; sponsored by Pavia University, Dipartimento di Informatica e Sistemistica, Centro di Cultura Scientifica "A. Volta" ; incooperation with the IEEE Computer Society Technical Committee on Computer Architecture ; with support from National research Council of Italy
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1995  x, 461 p. ; 28 cm
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47.

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sponsored by IEEE Computer Society Technical Committee on Computer Architecture, IEEE Computer Society Technical Committee on Distributed Computing, IEEE Computer Society Dallas Chapter
出版情報: Los Alamitos, Calif. ; Tokyo : IEEE Computer Society Press, c1996  xv, 618 p. ; 29 cm
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48.

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sponsored by the IEEE Computer Society and its Technical Committee on Computer Architecture and Simulation
出版情報: Los Alamitos : IEEE Computer Society Press, c1996  xiii, 297 p. ; 29 cm
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49.

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sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; edited by Peter Athanas and Kenneth L. Pocek
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1995  viii, 222 p. ; 28 cm
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50.

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sponsored by IEEE Computer Society Technical Committee on Computer Architecture, IEEE Computer Society Technical Committee on Distributed Computing, IEEE Computer Society Dallas Chapter
出版情報: Los Alamitos, Calif. ; Tokyo : IEEE Computer Society Press, c1995  xvii, 724 p. ; 29 cm
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51.

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sponsored by ACM SIGARCH, IEEE Computer Society, TCCA
出版情報: New York : ACM Press, c1996  xii, 318 p. ; 28 cm
シリーズ名: Computer architecture news ; v. 24, no. 2
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52.

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sponsored by IEEE Computer Society, Technical Committee on Computer Architecture, Association for Computing Machinery, SIGARCH
出版情報: Los Alamitos : IEEE Computer Society Press, c1994  xii, 394 p. ; 28 cm
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53.

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sponsored by IEEE Computer Society Technical Committee on Computer Architecture, IEEE Computer Society Technical Committee on Distributed Computing, IEEE Computer Society Dallas Section
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1994  xv, 733 p. ; 29 cm
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54.

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sponsored by the IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1995  xii, 393 p. ; 28 cm
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55.

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edited by P. Dowd, E. Gelenbe ; sponsored by IEEE Computer Society. Technical Committee on Computer Architecture, Technical Committee on Simulation
出版情報: Los Alamitos : IEEE Computer Society Press, c1995  xii, 443 p. ; 29 cm
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56.

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International Symposium on Computer Architecture ; SIGARCH ; Institute of Electrical and Electronics Engineers ; IEEE Computer Society. Technical Committee on Computer Architecture
出版情報: New York : ACM, c1991  xv, 399 p. ; 28 cm
シリーズ名: Computer architecture news ; v. 19, no. 3
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57.

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edited by V. Madisetti ... [et al.] ; sponsored by IEEE Computer Society. Technical Committee on Computer Architecture, Technical Committee on Simulation
出版情報: Los Alamitos : IEEE Computer Society Press, c1994  xiv, 425 p. ; 29 cm
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58.

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edited by Duncan A. Buell, Kenneth L. Pocek ; sponsored by IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1994  vii, 199 p. ; 28 cm
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59.

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[sponsored by IEEE Computer Society Technical Committee on Computer Architecture, Association for Computing Machinery SIGARCH, the Institute of Electrical and Electronics, Engineers]
出版情報: Washington, D.C. : IEEE Computer Society Press, c1989  xvii, 426 p. ; 28 cm
シリーズ名: Computer architecture news ; v. 17, no. 3
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60.

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sponsored by IEEE Computer Society, Technical Committee on Computer Architecture, Association for Computing Machinery, SIGARCH
出版情報: Los Alamitos : IEEE Computer Society Press, c1993  xii, 361 p. ; 28 cm
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61.

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sponsored by IEEE Computer Society Technical Committees on Supercomputing Applications and Computer Architecture, ACM SIGARCH
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1993  xxii, 935 p. ; 29 cm
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62.

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sponsored by IEEE Computer Society Technical Committee on Computer Architecture, IEEE Computer Society Technical Committee on Distributed Computing, IEEE Computer Society Dallas Chapter
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1993  xviii, 823 p. ; 29 cm
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63.

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sponsored by the IEEE Computer Society, Technical Committee on Computer Architecture in cooperation with Aarhus University
出版情報: Silver Spring, MD : IEEE Computer Society Press, c1983  xi, 221 p. ; 28 cm
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64.

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sponsored by the ACM Special Interest Group on Computer Architecture, the IEEE Computer Society Technical Committees on Supercomputing Applications and Computer Architecture ; in cooperation with Lawrence Livermore Laboratory ... [et al.]
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1991  xxiii, 917 p. ; 29 cm
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65.

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[sponsored by Association for Computing Machinery, SIGARCH, IEEE Computer Society, Technical Committee on Computer Architecture]
出版情報: New York : ACM, c1992  xvi, 439 p. ; 28 cm
シリーズ名: Computer architecture news ; v. 20, no. 2
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66.

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sponsored by IEEE Computer Society Technical Committee on Supercomputing Applications, IEEE Computer Society Technical Committee on Computer Architecture, ACM SIGARCH
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1992  xxiv, 848 p. ; 29 cm
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67.

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[sponsored by IEEE Computer Society Technical Committee on Computer Architecture, Association for Computing Machinery SIGARCH, the Institute of Electrical and Electronics Engineers]
出版情報: Washington, D.C. : Computer Society Press of the IEEE, c1990  xv, 378 p. ; 28 cm
シリーズ名: Computer architecture news ; v. 18, no. 2
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68.

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sponsored by IEEE Computer Society, Technical Committee on Computer Architecture, Technical Committee on VLSI, in cooperation with Computer Science Department, University of California at Los Angeles and IFIP Working Group 2.5 ; editors, Miloš D. Ercegovac, Earl Swartzlander
出版情報: Washington, D.C. ; Tokyo : IEEE Computer Society Press, c1989  xv, 247 p. ; 28 cm
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69.

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sponsored by ACM SIGARCH, IEEE Computer Society, TCCA ; with support of CICYT and CIRIT ; in cooperation with UPC
出版情報: Los Alamitos, CA : IEEE Computer Society, c1998  xiii, 394 p. ; 28 cm
シリーズ名: Computer architecture news ; special issue v. 26, no. 3 June 1998
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70.

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sponsored by IEEE Computer Society Technical Committee on Computer Architecture ... [et al.]
出版情報: Washington, D.C. : IEEE Computer Society Press , Los Angeles, CA : Order from IEEE Computer Society, c1986  xiii, 454 p. ; 28 cm
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71.

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sponsored by IEEE Computer Society Technical Committee on Computer Architecture ... [et al.]
出版情報: Washington, D.C. : IEEE Computer Society Press, c1987  xi, 321 p. ; 28 cm
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72.

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sponsored by IEEE Computer Society Technical Committee on Computer Architecture, Association for Computing Machinery SIGARCH, the Institute of Electrical and Electronics Engineers
出版情報: Washington, D.C. : Computer Society Press of the IEEE, c1988  xi, 461 p. ; 28 cm
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