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雑誌
1. IEEE transactions on device and materials reliability : a publication of the IEEE Electron Devices Society and the IEEE Reliability Society
Institute of Electrical and Electronics Engineers ; IEEE Electron Devices Society ; IEEE Reliability Society
出版情報: New York, N.Y. : Institute of Electrical and Electronics Engineers, c2001-  v.
巻次年月次: Vol. 1, no. 1 (Mar. 2001)-
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2.

図書
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2. International Electron Devices Meeting, 2001, Washington, DC, December 2-5, 2001 : iedm technical digest (: softbound ; : microfiche ; :CD-ROM)
sponsored by Electron Devices Society of IEEE
出版情報: Piscataway, N.J. : Institute of Electrical and Electronics Engineers, c2001  951 p. ; 28 cm
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3.

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3. 2001 International Semiconductor Conference : 24th edition, October 9-13, 2001, Sinaia, Romania : CAS 2001 proceedings (: set ; v. 1 ; v. 2)
[organized by National Institute for Research and Development in Microtechnologies (IMT) ; under the aegis of Romanian Academy Electrochemical Society Inc. ; co-sponsored by IEEE Electron Devices Society ... [et al.]]
出版情報: Piscataway, N. J. : IEEE Operations Center, c2001  2 v. (xx, 584 p.) ; 29 cm
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4.

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4. Proceedings of the 2001, 8th International Symposium on the Physical & Failure Analysis of Integrated Circuits, IPFA 2001
edited by Wilson Tan ... [et al.] ; organised by IEEE Reliability/CPMT/ED Singapore Chapter ; technical co-sponsored by IEEE Electron Devices Society ; in co-operation with Centre for IC Failure Analysis & Reliability, National University of Singapore, Institute of Microelectronics, Singapore
出版情報: Piscataway, NJ : Institute of Electrical and Electronics Engineers, c2001  262 p. ; 30 cm
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5.

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5. 2001 IEEE International Integrated Reliability Workshop final report, Stanford Sierra Camp, Lake Tahoe, California, October 15-18, 2001 (:softbound)
sponsored by the IEEE Electron Devices Society and the IEEE Reliability Society
出版情報: Piscataway, N.J. : IEEE Operations Center, c2001  v, 106 p. ; 28 cm
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6.

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図書
6. 2001 GaAs Reliability Workshop proceedings, October 21, 2001, Baltimore, Maryland (:softbound)
sponsored by JEDEC JC-14.7 Committee on GaAs Reliability and Quality Standards ; with technical co-sponsorship of the Electron Device Society of the Institute of Electrical and Electronics Engineers
出版情報: Piscataway, N.J. : IEEE Service Center, [2001]  vii, 222 p. ; 28 cm
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7.

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7. Proceedings of the IEEE 2001 Custom Integrated Circuits Conference : Town and Country Hotel, May 6-9, 2001, San Diego, California (: soft.)
sponsored by the IEEE Solid State Circuits Society and the Electron Devices Society
出版情報: [United States] : IEEE, c2001  582 p. ; 28 cm
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8.

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8. 2001 International Symposium on VLSI Technology, Systems, and Applications : proceedings of technical papers, April 18-20, 2001, Lakeshore Hotel, Hsinchu, Taiwan, ROC
[sponsored by Industrial Technology Research Institute, ROC ; in cooperation with Chinese Institute of Engineers, ROC ... [et al.]
出版情報: [United States] : IEEE, ITRI, c2001  310, iii p. ; 30 cm
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9. 2001 6th International Symposium on Plasma- and Process-Induced Damage, May 13-15, 2001, Monterey, California, USA (: soft.)
Manfred Engelhardt, Terence Hook, and Calvin T. Gabriel, ; technical co-sponsors, American Vacuum Society, IEEE/Electron Devices Society, Japanese Society of Applied Physics
出版情報: Santa Clara, Calif. : American Vacuum Society - Northen California Chapter, c2001  i, 128 p. ; 28 cm
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10.

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10. 2001 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium : digest of papers (: case.)
editor, Luciano Boglione ; sponsored by the IEEE Microwave Theory and Techniques Society and the IEEE Electron Devices Society
出版情報: [New York] : Institute of Electrical and Electronics Engineers, c2001  xxv, 300 p. ; 28 cm
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11.

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11. Conference proceedings, 2001 International Conference on Indium Phosphide and Related Materials : 13th IPRM, 14-18 May 2001, Nara New Public Hall, Nara, Japan
sponsored by the Japan Society of Applied Physics, IEEE Lasers and Electro-Optics Society, and IEEE Electron Devices Society ; in cooperation with the Institute of Electronics, Information and Communication Engineers, Optoelectronic Industry and Technology Development Association and the Research and Development Association for Future Electron Devices
出版情報: [United States] : IEEE, c2001  xiii, 635 p. ; 30 cm
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12.

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12. 59th Device Research Conference : conference digest, June 25-27, 2001, University of Notre Dame , Norte Dame, Indiana (: soft.)
sponsored by the IEEE Electron Devices Society
出版情報: [United States] : IEEE, c2001  xi, 215 p. ; 28 cm
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13.

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13. ICMTS 2001, proceedings of the 2001 IEEE International Conference on Microelectronic Test Structures, March 19-22, 2001, Kobe, Japan
sponsored by the IEEE Electron Devices Society
出版情報: [New York] : Institute of Electrical and Electronics Engineers, c2001  x, 271 p. ; 30 cm
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14. Proceedings of the 2001 Bipolar/BiCMOS Circuits and Technology Meeting, September 30 - October 2, 2001 (: softbound)
sponsored by IEEE Electron Devices Society ; in cooperation with IEEE Solid State Circuits Society IEEE Twin Cities Section
出版情報: Piscataway, N.J. : Institute of Electrical and Electronics Engineers, c2001  199 p. ; 28 cm
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15. 2001 IEEE International Symposium on Semiconductor Manufacturing : conference proceedings, October 8-10, 2001, San Jose, California (: softbound)
[sponsored by IEEE Electron Devices Society, IEEE Components Packaging and Manufacturing Technology Society, Semiconductor Equipment & Materials International (SEMI), and Society of Applied Physics of Japan]
出版情報: Piscataway, N.J. : IEEE Service Center, c2001  xi, 525 p. ; 28 cm
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16.

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16. Proceedings of the fourteenth Biennial University, Government, Industry, Microelectronics Symposium, June 17-20, 2001, Virginia Commonwealth University, Richmond Virginia (: soft)
sponsored by the Institute of Electrical and Electronic Engineers, Electron Devices Society ... [et al.]
出版情報: Piscataway, N.J. : IEEE Service Center, c2001  225 p. ; 28 cm
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17.

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図書
17. GaAs IC Symposium : IEEE Gallium Arsenide Integrated Circuit Symposium : 23rd Annual, Technical Digest 2001, Baltimore, Maryland, October 21-24,2001
co-sponsored by the IEEE Electron Devices Society, the IEEE Microwave Theory and Techniques Society, and the IEEE Solid-State Circuits Society
出版情報: Piscataway, N.J. : IEEE Service Center, c2001  ix, 279 p. ; 29 cm
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18.

図書
図書
18. ULSI Process Integration : proceedings of the International Symposium (II ; III ; IV)
editors, C.L. Claeys ... [et al.]
出版情報: Pennington, N.J. : Electrochemical Society, c2001-2005  3 v. ; 24 cm
シリーズ名: Proceedings / [Electrochemical Society] ; v. 2001-2, 2003-6, 2005-06
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目次情報: 続きを見る
Preface
Electronics Division Award Address
Radical Reaction Based Semiconductor Manufacturing for Very Advanced ULSI Process Integration / T. Ohmi
Keynote Papers
From Ambient Intelligence to Silicon Process Technology / C.J. van der Poel
From the Lab to the Fab: Transistors to Integrated Circuits / H. R. Huff
Diffused Silicon Transistors and Switches (1954-1955): The Beginning of Integrated Circuit Technology / N. Holonyak Jr.
Current Status and Future Prospects in Mixed Signal SOC / A. Matsuzawa
Process Integration for Memory Devices
DRAM Technology for 100nm and Beyond / K.H. Kusters ; J. Alsmeier ; J. Faul ; J. Lutzen ; T. Zell
Logic Based Embedded DRAM Technologies / C. Mallardeau
Flash Memory Technology Evolution / R. Bez ; E. Camerlenghi
FeRAM Technology: Today and Future / I. Kunishima ; N. Nagel
Effects of Nitridation Treatment for Electrochemical Properties of MONOS Non-Volatile Memories / H. Aozasa ; I. Fujiwara ; K. Nomoto ; H. Komatsu ; T. Kobayashi
The Crystallization Behavior and Interfacial Reaction of Ge[subscript 2]Sb[subscript 2]Te[subscript 5] Thin Films Between Dielectric Material for the Application to the Phase Change Memory / E.J. Jung ; S.K. Kang ; B.G. Min ; D.H. Ko
Full Process Integration Aspects
Single-Wafer Technology in a 300-mm Wafer Fab / S. Ikeda ; K. Nemoto ; M. Funabashi
The Impact of Single Wafer Processing on Process Integration / R. Singh ; M. Fakhruddin ; K.F. Poole
Advanced Multilevel Interconnects Technologies for 40-nm Lg Devices / T. Ohba
Performance Limitations of Metal Interconnects and Possible Alternatives / K.C. Saraswat ; P. Kapur ; S. Souri
Plasma Technologies for Low-k Dry Etching / T. Tatsumi
A Novel Approach to Contact Integration at 90-nm and Beyond / A. Singhal ; T. Sparks ; K. Strozewski ; F. Huang ; S. Parihar ; J. Schmidt ; B. Boeck ; J. Fretwell ; G. Yeap ; V. Sheth ; S. Veeraghavan ; B. Melnick
SiGe Process Integration
BiCMOS Integration of High-Speed SiGe:C HBTs / H. Rucker ; B. Heinemann ; R. Barth ; D. Knoll ; D. Schmidt ; W. Winkler
Applications of Silicon Germanium Electrodes in ULSI / E.-X. Ping ; E. Blomiley ; F. Gonzalez
Noise Properties and Hetero-Interface Traps in SiGe-Channel PMOSFETs / T. Tsuchiya ; J. Murota
Ultra-Shallow Junction Formation by Low Energy Ion Implantation and Flash Lamp Annealing / K. Suguro ; T. Ito ; T. Itani ; T. Iinuma
Integration Aspects for Emerging Technologies
Single and Few Electron Devices. Integration Trends / J. Gautier
Achieving Low Junction Capacitance on Bulk Si MOSFET Using SDOI Process / Z. Wang ; T. Abbott ; J. Trivedi ; C.-C. Cho ; M. Violette
Differential Silicide Thickness for ULSI Scaling / W.J. Taylor Jr. ; J. Smith ; J.-Y. Nguyen ; R. Rai ; O. Adetutu ; J. Geren ; J. Ybarra ; D. Petru
High-Voltage CMOS and Scaling Trends / H. Ballan
Emerging Device Solutions for the Post-Classical CMOS Era / K. De Meyer ; N. Collaert ; S. Kubicek ; A. Kottontharayil ; H. van Meer ; P. Verheyen
Modeling End-of-the-Roadmap Transistors / A. Asenov ; A.R. Brown ; J.R. Watling
Thin Film Transistors in ULSI--Status and Future / Y. Kuo
Extending Planar Single-Gate CMOS & Accelerating the Realization of Double-Gate/Multi-Gate CMOS Devices / J.O. Borland ; H. Iwai ; W. Maszara ; H. Wang
Surface Preparation and Gate Module
Cleaning for Sub 0.1 [mu]m Technology: A Particular Challenge / D.M. Knotter
Si Channel Surface Dependence of Electrical Characteristics in Ultra-Thin Gate Oxide CMOS / H.S. Momose
Integration Issues with High k Gate Stacks / C.M. Osburn ; S.K. Han ; I. Kim ; S.A. Campbell ; E. Garfunkel ; T. Gustafson ; J. Hauser ; T.-J. King ; Q. Liu ; P. Ranade ; A. Kingon ; D.-L. Kwong ; S.J. Lee ; C.H. Lee ; J. Lee ; K. Onishi ; C.S. Kang ; R. Choi ; H. Cho|cR. Nich ; G. Lucovsky ; J.G. Hong ; T.P. Ma ; W. Zhu ; Z. Luo ; J.P. Maria ; D. Wicaksana ; V. Misra ; J.J. Lee ; Y.S. Suh ; G. Parksons ; D. Niu ; S. Stemmer
Compatibility of Polysilicon with HfO[subscript 2]-based Gate Dielectrics for CMOS Applications / V. Kaushik ; S. De Gendt ; M. Caymax ; E. Young ; E. Rohr ; S. Van Elshocht ; A. Delabie ; M. Claes ; X. Shi ; J. Chen ; R. Carter ; T. Conard ; W. Vandervorst ; M. Schaekers ; M. Heyns
Analysis of CMOS Gate-To-Drain Leakage Current and Proposition of a New Cobalt Salicide Selective Etch Chemistry for High DRAM Yield / B. Froment ; C. Regnier ; M.-T. Basso
Electrical Characteristics and Thermal Stability of W[subscript 2]N/Ta[subscript 2]O[subscript 5]/Si MOS Capacitors in N[subscript 2]:H[subscript 2] or H[subscript 2] Ambients / P.C. Jiang ; J.S. Chen
Sub-Quarter Micron PMOSFET DC and AC NBTI Degradation / E. Li ; S. Prasad ; S. Park ; J. Walker
Process Integration in Integrated Circuit Applications
Physical Analysis and Modeling of Plasma Etching Mechanism for ULSI Application / M. Kanoh ; S. Onoue ; K. Nishitani ; T. Shinmura ; K. Iyanagi ; S. Kinoshita ; S. Takagi
Process Strategy for Built-in Reliability of Cu Damascene Interconnect System for 0.13um-Node and Beyond / H. Yamaguchi ; T. Oshima ; J. Noguchi ; K. Ishikawa ; H. Aoki ; T. Saito ; T. Furusawa ; K. Hinode
Impact of Wafer Backside Cu Contamination to 0.18 um Node Devices / S.Q. Gu ; L. Duong ; J. Elmer
Integrated Multiscale Process Simulation of Damescene Structures / M.O. Bloomfield ; Y.H. Im ; J. Seok ; C.P. Sukam ; J.A. Tichy ; T.S. Cale
An Analysis of the Effect of the Steps for Isolation Formation on STI Process Integration / A. Pavan ; D. Brazzelli ; M. Aiello ; C. Capolupo ; C. Clementi ; C. Cremonesi ; A. Ghetti
Defect Generation and Suppression in Device Processes Using a Shallow Trench Isolation Scheme / D. Peschiarolli ; M. Brambilla ; G.P. Carnevale ; A. Cascella ; F. Cazzaniga ; c. Clementi ; A. Gilardini ; M. Martinelli ; A. Maurelli ; I. Mica ; G. Pavia ; F. Piazza ; M.L. Polignano ; V. Soncini ; E. Bonera
Electrodeposition of Low-Dimensional Phases on Au Studied by EQCM and XRD / C. Shannon
Silicon-on-Insulator
60-nm Gate Length SOI CMOS Technology Optimized for "System-on-a-SOI-Chip" Solution / K. Imai ; S. Maruyama ; T. Suzuki ; T. Kudo ; S. Miyake ; M. Ikeda ; T. Abe ; S. Masuda ; A. Tanabe ; J.-W. Lee ; K. Shibahara ; S. Yokoyama ; H. Ooka
Emerging Silicon-On-Nothing (SON) Devices Technology / T. Skotnicki ; S. Monfray ; C. Frenouillet-Beranger
High Performance Strained-SOI CMOSFETs / S.-I. Takagi ; T. Mizuno ; T. Tezuka ; N. Sugiyama ; T. Numata ; K. Usuda ; Y. Moriyama ; S. Nakaharai ; J. Koga ; T. Maeda
Extremely Scaled Ultra-Thin Body and FinFET CMOS Devices / S. Balasubramanion ; L. Chang ; Y.-K. Choi ; D. Ha ; S. Xiong ; J. Bokor ; C. Hu
Fully Depleted SOI Process and Device Technology for Digital and RF Applications / F. Ichikawa ; Y. Nagatomo ; Y. Katakura ; S. Itoh ; H. Matsuhashi ; N. Hirashita ; S. Baba
Status and Future Development of PDSOI MOSFETs / S. Krishnan
Multi-fin Double Gate MOSFET Fabricated by Using (110)-Oriented SOI Wafers and Orientation dependent Etching / Y.X. Liu ; K. Ishii ; T. Tsutsumi ; M. Masahara ; H. Takashima ; E. Suzuki
Optimization of Ultra-Thin Body, Fully-Depleted-SOI Device, with Raised Source/Drain or Raised Extension / J.L. Egley ; A. Vandooren ; B. Winstead ; E. Verret ; B. White ; B.-Y. Nguyen
Partially Depleted SOI Dynamic Threshold MOSFET for Low-Voltage and Microwave Applications / M. Dehan ; D. Vanhoenacker-Janvier ; J.-P. Raskin
New Characterization Techniques for SOI and Related Devices / S. Okhonin ; M. Nagoga ; P. Fazan
Authors Index
Subject Index
Preface
Electronics Division Award Address
Radical Reaction Based Semiconductor Manufacturing for Very Advanced ULSI Process Integration / T. Ohmi
19.

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図書
19. ISLPED '01 : proceedings of the 2001, International Symposium on Low Power Electronics and Design, Hilton Waterfront Beach Resort, Huntington Beach, California, USA, August 6-7, 2001
sponsored by ACM SIGDA and IEEE Circuits and Systems Society ; with technical co-sponsorship from the IEEE Solid-State Circuits Society and the IEEE Electron Devices Society
出版情報: New York : Association for Computing Machinery, c2001  xii, 395 p. ; 28 cm
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20.

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20. Extended abstracts of the 2001 International Conference on Solid State Devices and Materials, September 26-28, 2001, Tokyo, Diamond Hotel
sponsored by the Japan Society of Applied Physics ; technical cosponsored by IEEE Electron Devices Society ; in cooperation with the Institute of Electronics, Information and Communication Engineers ... [et al.]
出版情報: Tokyo : Japan Society of Applied Physics, c2001  xxxviii, 693 p. ; 30 cm
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21.

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21. Proceedings of the 13th International Symosium on Power Semiconductor Devices & ICs : ISPSD '01, June 4-7, 2001, Osaka International Convention Center, Japan (: soft.)
Sponsored by the Institute of Electrical Engineers of Japan ; co-sponsored by the IEEE Electron Devices Society ; in cooperation with the Institute of Electronics Information and Communication Engineers of Japan and the Japan Society of Applied Physics
出版情報: Tokyo : Institute of Electrical Engineers of Japan, c2001  xxxi, 467 p. ; 30 cm
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22.

図書
図書
22. 2001 6th International Workshop on Statistical Methodology : IWSM, June 10, 2001, Kyoto (: soft.)
technical co-sponsored by IEEE Electron Devices Society ; co-sponsored by VLSI Symposium, the Japan Society of Applied Physics, IEEE ED Tokyo Chapter ; in cooperation with the Institute of Electronics, Information and Communication Engineers
出版情報: Piscataway, N.J. : Institute of Electrical and Electronics Engineers, c2001  vi, 67 p. ; 28 cm
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23.

図書
図書
23. Proceedings 2001 IEEE Hong Kong Electron Devices Meeting, 30 June 2001, the Hong Kong Polytechic University (: soft.)
sponsored by IEEE Electron Devices Society and Department of Electronic and Information Engineering, the Hong Kong Polytechnic University
出版情報: Piscataway, N.J. : Institute of Electrical and Electronics Engineers, c2001  vii, 157 p. ; 28 cm
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24.

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24. IVMC 2001 : proceedings of the 14th International Vacuum Microelectronics Conference, August 12-16, 2001, University of California, Davis, California USA (:softbound)
editors, Charles E. Hunt, Andrei G. Chakhovskoi, Nikolai N. Chubun, Mahua Hajra
出版情報: Piscataway, NJ. : Institute of Electrical and Electronics Engineers, c2001  xv, 313 p. ; 28 cm
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25.

図書
図書
25. 2001 Symposium on VLSI Technology : digest of technical papers, June 12-14, 2001, Kyoto (:softbound)
the Japan Society of Applied Physics, the IEEE Electron Devices Society
出版情報: Tokyo : Business Center for Academic Societies Japan, c2001  xv, 150 p. ; ill. ; 28 cm
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26.

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図書
26. Proceedings : 2001 International Conference on Computer Design : ICCD 2001, 23-26 September, 2001, Austin, Texas, USA (: softbound)
IEEE International Conference on Computer Design ; IEEE Computer Society ; IEEE Circuits and Systems Society ; IEEE Electron Devices Society
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2001  xxii, 559 p. ; 28 cm
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目次情報: 続きを見る
Welcome to ICCD
Organizing Committee
Program Committee
Additional Reviewers
ICCD 2002 Call for Papers
Keynote Addresses
The In-Car Computing Network: A Challenge for Embedded Systems / K.-T. Neumann
Clear and Present Tensions in Microprocessor Design / J. Shen
Moore's Law Meets Shannon's Law: The Evolution of the Communications Industry / L. Harrison
Technical Program
Asynchronous Techniques / Session 1.1：
Mousetrap: Ultra-High-Speed Transition-Signaling Asynchronous Pipelines / M. Singh ; S. M. Nowick
Arithmetic Logic Circuits using Self-Timed Bit Level Dataflow and Early Evaluation / R. B. Reese ; M. A. Thornton ; C. Traver
Efficient Systematic Error-Correcting Codes for Semi-Delay-Insensitive Data Transmission / F.-C. Cheng ; S.-L. Ho
Embedded Tutorial / Session 1.2：
Session Abstract
Design Constraints for Efficient Cryptographic Processing in Smart Cards / J.-F. Dhem
Security of Smartcard Integrated Circuits / E. von Faber
Architectural Modeling: Performance and Power Analysis / Session 1.3：
Minimal Subset Evaluation: Rapid Warm-Up for Simulated Hardware State / J. W. Haskins, Jr. ; K. Skadron
A Framework for Energy Estimation of VLIW Architecture / H. S. Kim ; N. Vijaykrishnan ; M. Kandemir ; M. J. Irwin
High-Level Power Modeling of CPLDs and FPGAs / L. Shang ; N. K. Jha
Caching / Session 2.1：
Symbolic Cache: Fast Memory Access Based on Program Syntax Correlation of Loads and Stores / Q. Ma ; J.-K. Peir ; L. Peng ; K. Lai
In-Line Interrupt Handling for Software-Managed TLBs / A. Jaleel ; B. Jacob
Design of a Predictive Filter Cache for Energy Savings in High Performance Processor Architectures / W. Tang ; R. Gupta ; A. Nicolau
Simulation Based Verification / Session 2.2：
A New Functional Test Program Generation Methodology / F. Fallah ; K. Takayama
A Functional Validation Technique: Biased-Random Simulation Guided by Observability-Based Coverage / S. Tasiran ; D. G. Chinnery ; S. J. Weber ; K. Keutzer
Selecting a Well Distributed Hard Case Test Suite for IEEE Standard Floating Point Division / L. D. McFearin ; D. W. Matula
Modeling of Capacitance and Crosstalk Noise / Session 2.3：
Linear Time Hierarchical Capacitance Extraction without Multipole Expansion / S. Balakrishnan ; J. H. Park ; H. Kim ; Y.-M. Lee ; C. C.-P. Chen
Analysis and Reduction of Capacitive Coupling Noise in High-Speed VLSI Circuits / P. Heydari ; M. Pedram
Crosstalk Noise Estimation for Generic RC Trees / M. Takahashi ; M. Hashimoto ; H. Onodera
Improving the Performance of Caching Structures / Session 3.1：
A Banked-Promotion TLB for High Performance and Low Power / J.-H. Lee ; J.-S. Lee ; S.-W. Jeong ; S.-D. Kim
Filtering Superfluous Prefetches Using Density Vectors / W.-F. Lin ; S. K. Reinhardt ; D. Burger ; T. R. Puzak
Allocation by Conflict: A Simple, Effective Multilateral Cache Management Scheme / E. S. Tam ; S. A. Vlaovic ; G. S. Tyson ; E. S. Davidson
Test Pattern Generation, Test Compaction, and Test Point Insertion for Synchronous Sequential Circuits / Session 3.2：
COREL: A Dynamic Compaction Procedure for Synchronous Sequential Circuits with Repetition and Local Static Compaction / I. Pomeranz ; S. M. Reddy
A Partitioning and Storage Based Built-In Test Pattern Generation Method for Synchronous Sequential Circuits
Cost-Effective Non-Scan Design for Testability for Actual Testability Improvement / D. Xiang ; Y. Xu
Power 4 Microprocessor / Session 3.3 Invited Session：
Power4 Microprocessor and System Design / J. Clabes
Power4 Design Methodology / B. Zoric
Semi-Custom Design Methodology for Power4 / P. Strenski
Power4 Integration / M. Scheuermann
Boolean Reasoning for Applications in CAD / A. KuehlmannSession 4.1：
Computer Arithmetic / Session 4.2：
Improved ZDN-Arithmetic for Fast Modulo Multiplication / H. Ploog ; S. Flugel ; D. Timmermann
Design Alternatives for Parallel Saturating Multioperand Adders / P. I. Balzola ; M. J. Schulte ; J. Ruan ; J. Glossner ; E. Hokenek
A Single-Multiplier Quadratic Interpolator for LNS Arithmetic / M. G. Arnold ; M. D. Winkel
Circuit Sizing and Optimization / Session 4.3：
Gate Sizing to Eliminate Crosstalk Induced Timing Violation / T. Xiao ; M. Marek-Sadowska
Performance Optimization by Wire and Buffer Sizing under the Transmission Line Model / T.-C. Chen ; S.-R. Pan ; Y.-W. Chang
Buffered Interconnect Tree Optimization using Lagrangian Relaxation and Dynamic Programming / S.-Y. Lai ; R. Baldick
Clocking and Time-Domain Measurements / Session 5.1：
Embedded Tutorial: Clocked Timing Elements for High-Performance and Low-Power VLSI Systems / V. Oklobdzija
Jitter-Induced Power/Ground Noise in CMOS PLLs: A Design Perspective
On the Micro-Architectural Impact of Clock Distribution Using Multiple PLLs / M. Saint-Laurent ; M. Swaminathan ; J. D. Meindl
On-Chip Oscilloscopes for Noninvasive Time-Domain Measurement of Waveforms / K. L. Shepard ; Y. Zheng
Processor Microarchitecture / Session 5.2：
Selective Branch Prediction Reversal by Correlating with Data Values and Control Flow / J. L. Aragon ; J. Gonzalez ; J. M. Garcia ; A. Gonzalez
Mutable Functional Units and Their Applications on Microprocessors / Y. Solihin ; K. W. Cameron ; Y. Luo ; D. Lavenier ; M. Gokhale
Compiler-Directed Classification of Value Locality Behavior / Q. Zhao ; D. J. Lilja
A Hierarchical Dependence Check and Folded Rename Mapping Based Scalable Dispatch Stage / V. Sankaranarayanan ; A. Tyagi
Invited Session: Taming Tons of Gigabytes: Innovations in Disk Drive Electronics / Session 5.3：
Designing Circuits for Disk Drives / G. Pelz
Hard Disk Controller: The Disk Drive's Brain and Body / J. Jeppensen ; W. Allen ; S. Anderson ; M. Pilsl
Motion-Control: The Power Side of Disk Drives / W. Sereinig
Energy Efficiency Caches and Multiport Cache Structures / Session 6.1：
Static Energy Reduction Techniques for Microprocessor Caches / H. Hanson ; M. S. Hrishikesh ; V. Agarwal ; S. W. Keckler
Parallel Cachelets / D. Limaye ; R. Rakvic ; J. P. Shen
Access Region Cache: A Multi-Porting Solution for Future Wide-Issue Processors / B. S. Thakar ; G. Lee
Control by Simulation and On-line Checking / Session 6.2：
Distributed Event-Driven Simulation of VHDL-SPICE Mixed-Signal Circuits / D. Lungeanu ; C. J. R. Shi
High Performance Parallel Fault Simulation / A. K. Varshney ; B. Vinnakota ; E. Skuldt ; B. Keller
On-Line Integrity Monitoring of Microprocessor Control Logic / S. Kim ; A. K. Somani
CAD Algorithms for Physical Design / Session 6.3：
A Timing-Driven Macro-Cell Placement Algorithm / F. Mo ; A. Tabbara ; R. K. Brayton
Fixed-Outline Floorplanning through Better Local Search / S. N. Adya ; I. L. Markov
Generic ILP-Based Approaches for Dynamically Reconfigurable FPGA Partitioning / G.-M. Wu ; J.-M. Lin ; M. C.-T. Chao
Panel Discussion
How Much Longer Will SuperScalar Microarchitectures Scale? / D. Burger (chair) ; M. Hill ; M. Hopkins ; M. McDermott ; Y. Patt ; M. Snyder ; G. Sohi
Invited Session: Network Processors / Session 7.1：
Network Processing: Applications and Challenges / C. Narad
Payload+: Fast Pattern Matching and Routing for OC-48 / D. Kramer
Scaling Fully Programmable Network Processing to 10Gbps and Beyond / K. Morris
Formal Methods for Property Verification and Equivalence Verification / Session 7.2：
Arithmetic Transforms for Verifying Compositions of Sequential Datapaths / K. Radecka ; Z. Zilic
Hierarchical Image Computation with Dynamic Conjunction Scheduling / C. Meinel ; C. Stangier
Introduction to Generalized Symbolic Trajectory Evaluation / J. Yang ; C.-J. H. Seger
Hardware Representation / Session 7.3：
BDD Variable Ordering by Scatter Search / W. N. N. Hung ; X. Song
Lower Bound Based DDD Minimization for Efficient Symbolic Circuit Analysis / A. Manthe ; C-J. R. Shi
Run-Time Execution of Reconfigurable Hardware in a Java Environment / L. A. S. King ; H. Quinn ; M. Leeser ; D. Galatopoullos ; E. Manolakos
Circuit Techniques / Session 8.1：
Realization of Multiple-Output Functions by Reconfigurable Cascades / Y. Iguchi ; T. Sasao ; M. Matsuura
A Low-Power Cache Design for CalmRISC-Based Systems / S. Cho ; W. Jung ; Y. Kim
Interconnect-Centric Array Architectures for Minimum SRAM Access Time / A. J. Bhavnagarwala ; S. Kosonocky
Understanding and Addressing the Noise Induced by Electrostatic Discharge in Multiple Power Supply Systems / J. Lee ; Y. Huh ; P. Bendix ; S.-M. Kang
DSP/Multimedia / Session 8.2：
Cost-Effective Hardware Acceleration of Multimedia Applications / D. Talla ; L. K John
MPEG Macroblock Parsing and Pel Reconstruction on an FPGA-Augmented TriMedia Processor / M. Sima ; S. Cotofana ; S. Vassiliadis ; J. T. J. van Eijndhoven ; K. Vissers
Low-Energy DSP Code Generation Using a Genetic Algorithm / M. Lorenz ; R. Leupers ; P. Marwedel ; T. Drager ; G. Fettweis
Voltage Scaling for Energy Minimization with QoS Constraints / A. Manzak ; C. Chakrabarti
Novel Architectures and ISA Extensions / Session 8.3：
Matching Architecture to Application via Configurable Processors: A Case Study with Boolean Satisfiability Problem / Y. Zhao ; S. Malik ; A. Wang ; M. W. Moskewicz ; C. F. Madigan
Architectural Enhancements for Fast Subword Permutations with Repetitions in Cryptographic Applications / J. P. McGregor ; R. B. Lee
3DCGiRAM: An Intelligent Memory Architecture for Photo-Realistic Image Synthesis / H. Kobayashi ; K. Suzuki ; K. Sano ; Y. Kaeriyama ; Y. Saida ; N. Oba ; T. Nakamura
Use of Local Memory for Efficient Java Execution / S. Tomar
Poster Papers
An Analytical Model for Trace Cache Instruction Fetch Performance / A. Hossain ; D. J. Pease
Performance Driven Global Routing through Gradual Refinement / J. Hu ; S. S. Sapatnekar
Fuzzified Iterative Algorithms for Performance Driven Low Power VLSI Placement / S. M. Sait ; H. Youssef ; J. A. Khan ; A. El-Maleh
Fast Specification of Cycle-Accurate Processor Models / F. S.-H. Chang ; A. J. Hu
A Performance Analysis of the Active Memory System / W. Srisa-an ; C.-T. D. Lo ; J. M. Chang
Combined IEEE Compliant and Truncated Floating Point Multipliers for Reduced Power Dissipation / K. E. Wires ; J. E. Stine
An Algorithm for Dynamically Reconfigurable FPGA Placement
RC-In RC-Out Model Order Reduction Accurate up to Second Order Moments / P. Ganesh
Efficient Function Approximation for Embedded and ASIC Applications / J. W. Hauser ; C. N. Purdy
An Area-Efficient Iterative Modified-Booth Multiplier Based on Self-Timed Clocking / M.-C. Shin ; S.-H. Kang ; I.-C. Park
A Heuristic for Multiple Weight Set Generation / H.-S. Kim ; S. Kang
Towards a Formal Model of Shared Memory Consistency for Intel Itanium / P. Chatterjee ; G. Gopalakrishnan
Efficient Algorithms for Subcircuit Enumeration and Classification for the Module Identification Problem / J. L. White ; M.-J. Chung ; A. S. Wojcik ; T. E. Doom
MCOMA: A Multithreaded COMA Architecture / H. El Naga ; J.-L. Gaudiot
Automatic Generation and Validation of Memory Test Models for High Performance Microprocessors / K. Zarrineh ; T. A. Ziaja ; A. Majumdar
Reducing Cache Pollution of Prefetching in a Small Data Cache / P. Reungsang ; S. K. Park ; H.-L. Roh
Alloyed Path-Pattern Scheme for Branch Prediction / R. Ramanujam ; M. Ravirala
Timing Characterization of Dual-Edge Triggered Flip-Flops / N. Nedovic ; M. Aleksic ; V. G. Oklobdzija
Performance Impact of Addressing Modes on Encryption Algorithms / A. M. Fiskiran
Determining Schedules for Reducing Power Consumption Using Multiple Supply Voltages / N. Chabini ; E. M. Aboulhamid ; Y. Savaria
Pre-Routing Estimation of Shielding for RLC Signal Integrity / J. D. Z. Ma ; A. Parihar ; L. He
Author Index
Welcome to ICCD
Organizing Committee
Program Committee
27.

図書
図書
27. 2001 IEEE International SOI Conference, proceedings, October 1-4, 2001, the Sheraton Tamarron Resort, Durango, Colorado
sponsored by the IEEE Electron Devices Society
出版情報: Piscataway, N.J. : IEEE Service Center, c2001  x, 158 p. ; 28 cm
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