close
1.

図書
図書
1. Proceedings, 2000 IEEE Symposium on Field-Programmable Custom Computing Machines, April 17-19, 2000, Napa Valley, California
sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; edited by Brad L. Hutchings
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c2000  x, 348 p. ; 28 cm
所蔵情報: loading…
目次情報: 続きを見る
Conference Organizers
Architecture / Andre DeHonSession 1：
Design of a VLIW Compute Accelerator on the Transmogrifier-2 / L. Zhang ; Q. Wang ; D. Lewis
A Scalable, Loadable Custom Programmable Logic Device for Solving Boolean Satisfiability Problems / M. Boyd ; T. Larrabee
Configuration Caching Management Techniques for Reconfigurable Computing / Z. Li ; K. Compton ; S. Hauck
Compilation 1 / Wayne LukSession 2：
A Matlab Compiler for Distributed, Heterogeneous, Reconfigurable Computing Systems / P. Banerjee ; N. Shenoy ; A. Choudhary ; C. Bachmann ; M. Haldar ; P. Joisha ; A. Jones ; A. Kanhare ; A. Nayak ; S. Periyacheri ; M. Walkden ; D. Zaretsky
Stream-Oriented FPGA Computing in the Streams-C High Level Language / M. Gokhale ; J. Stone ; J. Arnold ; M. Kalinowski
Applications 1 / Philip FreidenSession 3：
A Reconfigurable Computing Architecture for Microsensors / S. Scalera ; M. Falco ; B. Nelson
FPGA Implementation of a Microcoded Elliptic Curve Cryptographic Processor / K. Leung ; K. Ma ; W. Wong ; P. Leong
Customizing Graphics Applications: Techniques and Programming Interface / H. Styles ; W. Luk
Compilation 2 / Scott HauckSession 4：
Automatic Synthesis of Data Storage and Control Structures for FPGA-Based Computing Engines / P. Diniz ; J. Park
A C to HDL Compiler for Pipeline Processing on FPGAs / T. Maruyama ; T. Hoshino
Cryptographic Applications / John McHenrySession 5：
High Performance DES Encryption in Virtex FPGAs Using Jbits / C. Patterson
A Bit-Serial Implementation of the International Data Encryption Algorithm IDEA / M. Leong O. Cheung ; K. Tsoi
An Adaptive Cryptographic Engine for IPSec Architectures / A. Dandalis ; V. Prasanna ; J. Rolim
Programming Tools / Brad HutchingsSession 6：
Death of the RLOC? / S. Singh
Automated Extraction of Run-Time Parameterizable Cores from Programmable Device Configurations / P. James-Roxby ; S. Guccione
Fault Tolerance / Philip KuekesSession 7：
Dynamic Fault Tolerance in FPGAs via Partial Reconfiguration / J. Emmert ; C. Stroud ; B. Skaggs ; M. Abramovici
An ACS Robotic Control Algorithm with Fault Tolerant Capabilities / S-Y. Yu ; N. Saxena ; E. McCluskey
Tunable Fault Tolerance for Runtime Reconfigurable Architectures / S. Sinha ; P. Kamarchik ; S. Goldstein
Wireless Applications / Tom KeanSession 8：
Synchronization in Software Radios--Carrier and Timing Recovery Using FPGAs / C. Dick ; F. Harris ; M. Rice
Architecture and Application of a Dynamically Reconfigurable Hardware Array for Future Mobile Communication Systems / A. Alsolaim ; J. Becker ; M. Glesner ; J. Starzyk
Applications 2 / Mike ButtsSession 9：
Implementation of Near Shannon Limit Error-Correcting Codes Using Reconfigurable Hardware / B. Levine ; R. Taylor ; H. Schmit
Hardware-Software Codesign and Parallel Implementation of a Golomb Ruler Derivation Engine / E. Sotiriades ; A. Dollas ; P. Athanas
An FPGA-Based Coprocessor for the Parsing of Context-Free Grammars / C. Ciressan ; E. Sanchez ; M. Rajman ; J-C. Chappelier
Applications 3 / Don BouldinSession 10：
A Reliable LZ Data Compressor on Reconfigurable Coprocessors / W-J. Huang
Evidence: An FPGA-Based System for Photon EVent IDENtification and CEntroiding / M. Alderighi ; S. D'Angelo ; G. Sechi
Improving the Performance and Efficiency of an Adaptive Amplification Operation Using Configurable Hardware / M. Wirthlin ; S. Morrison ; P. Graham ; B. Bray
Poster Session 1
Configuration Relocation and Defragmentation for Reconfigurable Computing / J. Cooley ; S. Knol
Mapping Algorithms for a Multi-Bit Data Path Processing Reconfigurable Chip RHW / T. Yamauchi ; S. Nakaya ; T. Inuo ; N. Kajihara
Hardware Accelerator for Subgraph Isomorphism Problems / S. Ichikawa ; L. Udorn ; K. Konishi
A Reconfigurable Hardware Platform for Digital Real-Time Signal Processing in Television Studios / K. Henriss ; P. Ruffer ; R. Ernst ; S. Hasenzahl
Reconfigurable Array Media Processor (RAMP) / K. Rath ; S. Tangirala ; P. Friel ; P. Bolsara ; J. Flores ; J. Wadley
Internet Connected FPGAs / H. Fallside ; M. Smith
A Reconfigurable Stochastic Model Simulator for analysis of parallel systems / O. Yamamoto ; Y. Shibata ; H. Kurosawa ; H. Amano
Poster Session 2
A Virtual Hardware System on a Dynamically Reconfigurable Logic Device / M. Uno ; K. Furuta ; T. Fujii ; M. Motomura
Optimal vs. Heuristic Approaches to Context Scheduling for Multi-Context Reconfigurable Architectures / R. Maestre ; F. Kurdahi ; M. Fernandez ; R. Hermida ; N. Bagherzadeh ; H. Singh
A Communication Scheduling Algorithm For Multi-FPGA Systems / J. Suh ; D-I. Kang ; S. Crago
Preemptive Multitasking on FPGAs / L. Levinson ; R. Manner ; M. Sessler ; H. Simmler
BigSky--An On-Line Arithmetic Design Tool for FPGAs / A. Schneider ; R. McIlhenny ; M. Ercegovac
Improving the FPGA Design Process through Determining and Applying Logical-to-Physical Design Mappings / B. Hutchings
Multiple Precision for Resource Minimization / G. Constantinides ; P. Cheung
StReAm: Object-Oriented Programming of Stream Architectures Using PAM-Blox / O. Mencer ; H. Hubert ; M. Morf ; M. Flynn
Poster Session 3
An FPGA-Based Array Processor for an Ionospheric-Imaging Radar / T. Tuan ; M. Figueroa ; F. Lind ; X. Zhou ; X. Diorio ; J. Sahr
Embedded Compilation for Multimedia Applications / N. Daw ; D. Strelow
Interfacing Reconfigurable Logic with a CPU / K. Walker ; M. Budiu
A Run-Time Reconfigurable Plug-In for the Winamp MP3 Player / J. Scalera ; M. Jones
Accelerating Embedded Applications Using Dynamically Reconfigurable Hardware and Evolutionary Algorithms / J. Harkin ; T. McGinnity ; L. Maguire
Implementation of a Configurable Controller for an AC Drive Control: A Case Study / M. Imecs ; P. Bikfalvi ; S. Nedevschi ; J. Vasarhelyi
Pattern Recognition and Reconstruction on an FPGA Coprocessor Board
Poster Session 4
FCCMs and the Memory Wall / S. Derrien ; S. Rajopadhye
A C to Hardware/Software Compiler / K. Bazargan ; R. Kastner ; S. Ogrenci ; M. Sarrafzadeh
Evaluating Hardware Compilation Techniques / M. Weinhardt
Adapting Constant Multipliers in a Neural Network Implementation / B. Blodget
A Networked FPGA-Based Hardware Implementation of a Neural Network Application / H. Restrepo ; R. Hoffmann ; A. Perez-Uribe ; C. Teuscher
Design of C++ Class Library and Bit-Serial Compiler for Variable-Precision Datapath Synthesis on Adaptive Computing Systems / K. Suzuki ; M. Wang ; F. Zhao ; W. Dai
An Investigation of Reconfigurable Multipliers for Use in Adaptive Signal Processing / T. Courtney ; R. Turner ; R. Woods
Combining Serialization and Reconfiguration for Convolver Designs / A. Derbyshire
Author Index
Conference Organizers
Architecture / Andre DeHonSession 1：
Design of a VLIW Compute Accelerator on the Transmogrifier-2 / L. Zhang ; Q. Wang ; D. Lewis
2.

図書
図書
2. Proceedings, 1999 International Conference on Parallel Architectures and Compilation Techniques, October 12-16, 1999, New port Beach, California
sponsored by IFIP and IEEE Computer Society
出版情報: Los Alamitos, Calif. : IEEE Computer society, c1999  xv, 321 p. ; 28 cm
所蔵情報: loading…
目次情報: 続きを見る
Message from the Chairs
Organizing Committee
Program Committee
Reviewers
Microarchitecture / Session 1：
Exploring Instruction-Fetch Bandwidth Requirement in Wide-Issue Superscalar Processors / P. Michaud ; A. Seznec ; S. Jourdan
MPEG-2 Video Decompression on Simultaneous Multithreaded Multimedia Processors / H. Oehring ; U. Sigmund ; T. Ungerer
A Fully Asynchronous Superscalar Architecture / D. Arvind ; R. Mullins
Multithreading / Session 2：
The Need for Fast Communication in Hardware-Based Speculative Chip Multiprocessors / V. Krishnan ; J. Torellas
A Multithreaded Java Microcontroller for Thread-Oriented Real-Time Event Handling / U. Brinkschulte ; C. Krakowski ; J. Kreuzinger
On Dynamic Speculative Thread Partitioning and the MEM-Slicing Algorithm / L. Codrescu ; D. Wills
Prediction Mechanisms / Session 3：
Branch Prediction Using Selective Branch Inversion / S. Manne ; A. Klauser ; D. Grunwald
Control-Flow Speculation through Value Prediction for Superscalar Processors / J. Gonzalez ; A. Gonzalez
Exploring Last n Value Prediction / M. Burtscher ; B. Zorn
Compilation Techniques / Session 4：
Evaluating Register Allocation and Instruction Scheduling Techniques in Out-Of-Order Issue Processors / M. Valluri ; R. govindarajan
Containers on the Parallelization of General-Purpose Java Programs / P. Wu ; D. Padua
The Modulo Interval: A Simple and Practical Representation for Program Analysis / T. Nakanishi ; K. Joe ; C. Polychronopoulos ; A. Fukuda
Performance Characterization / Session 5：
Memory System Support for Image Processing / L. Zhang ; B. Carter ; W. Hsieh ; S. McKee
Performance Characteristics of a Network of Commodity Multiprocessors for the NAS Benchmarks Using a Hybrid Memory Model / F. Capello ; O. Richard
Quantifying the Benefits of SPECint Distant Parallelism in Simultaneous Multi-Threading Architectures / D. Ortega ; I. Martel ; E. Ayguade ; M. Valero
Invited Talk
High-End Computing Technology: Where is it Heading? / Greg Astfalk ; Hewlett-Packard Company
Advanced Compilation / Session 6：
LaTTe: A Java VM Just-In-Time Compiler with Fast and Efficient Register Allocation / B-S. Yang ; S-M. Moon ; S. Park ; J. Lee ; S. Lee ; J. Park ; Y. Chung ; S. Kim ; K. Ebcioglu ; E. Altman
Automatic Parallelization of Recursive Procedures / M. Gupta ; S. Mukhopadhyay ; N. Sinha
On the Complexity of Loop Fusion / A. Darte
Micro-Clusters, Clusters and SMPs / Session 7：
A Cost-Effective Clustered Architecture / R. Canal ; J-M. Parcerisa
Optimizing Data Locality for SCI-Based PC-Clusters with the SMiLE Monitoring Approach / W. Karl ; M. Leberecht ; M. Schultz
Dynamic Linking on a Shared-Memory Multiprocessor / B. Alpern ; M. Charney ; J-D. Choi ; A. Cocchi ; D. Lieber
Reducing Cache Conflicts by Partitioning and Privatizing Shared Arrays / Z. Li
Applied Analytical Techniques / Session 8：
Localizing Non-Affine Array References / N. Mitchell ; L. Carter ; J. Ferrante
On Reducing False Sharing while Improving Locality on Shared Memory Multiprocessors / M. Kandemir ; A. Choudhary ; J. Ramanujam ; P. Banerjee
Lower Bounding Techniques for the Multiprocessor Scheduling Problem with Communication Delay / S. Fujita ; T. Nakagawa
Automatic Analytical Modeling for the Estimation of Cache Misses / B. Fraguela ; R. Doallo ; E. Zapata
Linux Alighted: Down to Earth Clusters / Beau Vrolyk ; Silicon Graphics
Architecture-Driven Compilation / Session 9：
Cameron: High level Language Compilation for Reconfigurable Systems / J. Hammes ; B. Rinker ; W. Bohm ; W. Najjar ; B. Draper ; R. Beveridge
Predicated Static Single Assignment / B. Simon ; B. Calder
The Effect of Program Optimization on Trace Cache Efficiency / D. Howard ; M. Lipasti
Advanced Parallelization / Session 10：
Data Dependence Testing in Practice / K. Psarris ; K. Kyriakopoulos
On Index Set Splitting / M. Griebl ; P. Feautrier ; C. Lenguaer
Efficient Parallelization Using Combined Loop and Data Transformations / M. O'boyle ; P. Knijnenburg
Predication and Speculation / Session 11：
Caching and Predicting Branch Sequences for Improved Fetch Effectiveness / S. Onder ; J. Xu ; R. Gupta
In Search of Speculative Thread-Level Parallelism / J. Oplinger ; D. Heine ; M. Lam
Looking at History to Filter Allocations in Prediction Tables / E. Morancho ; J. Maria Llaberia ; A. Olive
Author Index
Message from the Chairs
Organizing Committee
Program Committee
3.

図書
図書
3. Proceedings : Seventh Annual IEEE Symposium on Field-Programmable Custom Computing Machines FCCM '99, April 21-23, 1999, Napa Valley, California
sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; edited by Kenneth L. Pocek and Jeffrey Arnold
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1999  x, 319 p. ; 28 cm
所蔵情報: loading…
目次情報: 続きを見る
Co-Chairs and Program Committee
Tools 1 / Session 1：
Macro-Based Hardware Compilation of Java Bytecodes into a Dynamic Reconfigurable Computing System / J.M.P. Cardoso ; H.C. Neto
A CAD Suite for High-Performance FPGA Design / B. Hutchings ; P. Bellows ; J. Hawkins ; S. Hemmert ; B. Nelson ; M. Rytting
Formal Verification of Reconfigurable Cores / S. Singh ; C.J. Lillieroth
Network Applications / Session 2：
Transmutable Telecom System and Its Application / T. Miyazaki ; T. Murooka ; M. Katayama ; A. Takahara
Implementation and Evaluation of a Prototype Reconfigurable Router / J.R. Hess ; D.C. Lee ; S.J. Harper ; M.T. Jones ; P.M. Athanas
Compilation / Session 3：
Pipeline Vectorization for Reconfigurable Systems / M. Weinhardt ; W. Luk
Automatic Allocation of Arrays to Memories in FPGA Processors with Multiple Memory Banks / M.B. Gokhale ; J.M. Stone
Parallelizing Applications into Silicon / J. Babb ; M. Rinard ; C.A. Moritz ; W. Lee ; M. Frank ; R. Barua ; S. Amarasinghe
Architectures / Session 4：
Reconfigurable Elements for a Video Pipeline Processor / M.R. Piacentino ; G.S. van der Wal ; M.W. Hansen
ConCISe: A Compiler-Driven CPLD-Based Instruction Set Accelerator / B. Kastrup ; A. Bink ; J. Hoogerbrugge
Tools 2 / Session 5：
CPR: A Configuration Profiling Tool / S. Cadambi ; S.C. Goldstein
Debugging Techniques for Dynamically Reconfigurable Hardware / N. McKay
Improving Simulation Accuracy in Design Methodologies for Dynamically Reconfigurable Logic Systems / M. Vasilko ; D. Cabanis
Graphics Applications / Session 6：
Reconfigurable Computing for Augmented Reality / T.K. Lee ; J.R. Rice ; N. Shirazi ; P.Y.K. Cheung
Sepia: Scalable 3D Compositing using PCI Pamette / L. Moll ; A. Heirich ; M. Shand
Applications / Session 7：
An Edge-Endpoint-Based Configurable Hardware Architecture for VLSI CAD Layout Design Rule Checking / Z. Luo ; M. Martonosi ; P. Ashar
Fafner--Accelerating Nesting Problems with FPGAs / J.C. Alves ; J.C. Ferreira ; C. Albuquerque ; J.F. Oliveira ; J.S. Ferreira ; J. Silva Matos
DSP Applications / Session 8：
Field Programmable Gate Array Based Radar Front-End Digital Signal Processing / T.J. Moeller ; D.R. Martinez
Optimizing FPGA-Based Vector Product Designs / D. Benyamin ; J. Villasenor
Run Time Systems / Session 9：
PCI-PipeRench and the SwordAPI: A System for Stream-based Reconfigurable Computing / R. Laufer ; R.R. Taylor ; H. Schmit
Safe and Protected Execution for the Morph/AMRM Reconfigurable Processor / A.A. Chien ; J.H. Byun
Implementing an API for Distributed Adaptive Computing Systems / M. Jones ; L. Scharf ; J. Scott ; C. Twaddle ; M. Yaconis ; K. Yao ; P. Athanas ; B. Schott
Arithmetic / Session 10：
A Super-Serial Galois Fields Multiplier for FPGAs and its Application to Public-Key Algorithms / G. Orlando ; C. Paar
Automatic Floating to Fixed Point Translation and its Application to Post-Rendering 3D Warping / M.P. Leong ; M.Y. Yeung ; C.K. Yeung ; C.W. Fu ; P.A. Heng ; P.H.W. Leong
Dynamic Precision Management for Loop Computations on Reconfigurable Architectures / K. Bondalapati ; V.K. Prasanna
Poster Session 1
Accelerating Run-Time Reconfiguration on FCCMs / J.-P. Heron ; R.F. Woods
A Virtual Hardware Handler for RTR Systems / R. Turner ; S. Sezer
Algorithm Analysis and Mapping Environment for Adaptive Computing Systems: Further Results / E.K. Pauer ; P.D. Fiore ; J.M. Smith
Development System for FPGA-Based Digital Circuits / V. Sklyarov ; J. Fonseca ; R. Monteiro ; A. Oliveira ; A. Melo ; N. Lau ; I. Skliarova ; P. Neves ; A. Ferrari
Design of a JTAG Based Run Time Reconfigurable System / C. Cousineau ; F. Laperle ; Y. Savaria
Architectures for System-Level Applications of Adaptive Computing / C. Chen ; S. Crago ; J. Czarnaski ; M. French ; I. Hom ; T. Tho ; T. Valenti
Task-level Partitioning and RTL Design Space Exploration for Multi-FPGA Architectures / V. Srinivasan ; R. Vemuri
Enabling Automatic Module Generation for FCCM Compilers / A. Koch
Poster Session 2
ICARUS: A Dynamically Reconfigurable Computer Architecture / M. Baxter
SONIC--A Plug-In Architecture for Video Processing / S.D. Haynes ; J. Stone
A Reconfigurable Platform for Academic Purposes / C. Teuscher ; J.-O. Haenni ; F.J. Gomez ; H.F. Restrepo ; E. Sanchez
VHDL Placement Directives for Parametric IP Blocks / J. Hwang ; C. Patterson ; S. Mitra
Runlength Compression Techniques for FPGA Configurations / S. Hauck ; W.D. Wilson
Poster Session 3
Accelerating An IR Automatic Target Recognition Application with FPGAs / J. Jean ; X. Liang ; B. Drozd ; K. Tomko
Mapping of an Automated Target Recognition Application from a Graphical Software Environment to FPGA-based Reconfigurable Hardware / B. Levine ; S. Natarajan ; C. Tan ; D. Newport ; D. Bouldin
Hybrid Data/Configuration Caching for Striped FPGAs / D. Deshpande ; A.K. Somani ; A. Tyagi
On Reconfiguring Cache for Computing / H.-S. Kim
Reconfigurable Pipelines in VLIW Execution Units / R.D. Williams ; B.D. Kuebert
Fast Online Placement for Reconfigurable Computing Systems / K. Bazargan ; M. Sarrafzadeh
Poster Session 4
A Compact Fast Variable Key Size Elliptic Curve Cryptosystem Coprocessor / L. Gao ; S. Shrivastava ; H. Lee ; G.E. Sobelman
A Virtual Logic Algorithm for Solving Satisfiability Problems Using Reconfigurable Hardware / M. Abramovici ; J.T. de Sousa
Reducing Compilation Time of Zhong's FPGA-based SAT solver / P.K. Chan ; M.J. Boyd ; S. Goren ; K. Klenk ; V. Kodavati ; R. Kundu ; M. Margolese ; J. Sun ; K. Suzuki ; E. Thorne ; X. Wang ; J. Xu ; M. Zhu
FPGA-based Structures for On-line FFT and DCT / D. Lau ; A. Schneider ; M.D. Ercegovac
An FPGA-based Fan Beam Image Reconstruction Module / L. Maltar ; F.M.G. Franca ; V.C. Alves ; C.L. Amorim
Bezier Curve Rendering on Virtex / D. MacVicar ; R. Slous
Author Index
Co-Chairs and Program Committee
Tools 1 / Session 1：
Macro-Based Hardware Compilation of Java Bytecodes into a Dynamic Reconfigurable Computing System / J.M.P. Cardoso ; H.C. Neto
4.

図書
図書
4. Proceedings : Fifth International Symposium on High-Performance Computer Architecture : January 9-13, 1999, Orlando, Florida (: ; : microfiche)
sponsored by IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Cailf : IEEE Computer Society Press, c1999  xiii, 324 p. ; 28 cm
所蔵情報: loading…
5.

図書
図書
5. Proceedings of The 26th International Symposium on Computer Architecture , May 2-4, 1999, Atlanta, Georgia (: softbound ; : casebound ; : microfiche)
sponsored by IEEE Computer Society TCCA, ACM SIGARCH ; with support from The Georgia Institute of Technology
出版情報: Los Alamitos, CA : IEEE Computer Society, c1999  xii, 317 p. ; 28 cm
シリーズ名: Computer architecture news ; vol. 27, no. 2 May 1999 special issue
所蔵情報: loading…
6.

図書
図書
6. Proceedings : 7th Symposium on Computer Arithmetic, June 4-6, 1985, University of Illinois, Urbana, Illinois
sponsored by the IEEE Computer Society, Technical Committee on Computer Architecture in cooperation with The University of Illinois
出版情報: Silver Spring, MD : IEEE Computer Society Press, c1985  xi, 343 p. ; 28 cm
所蔵情報: loading…
7.

図書
図書
7. Proceedings : 5th Symposium on Computer Arithmetic, May 18-19, 1981, University of Michigan, Ann Arbor, Michigan
sponsored by the IEEE Computer Society, Technical Committee on Computer Architecture in cooperation with the University of Michigan
出版情報: Silver Spring, MD : IEEE Computer Society Press, c1981  vii, 278 p. ; 28 cm
所蔵情報: loading…
8.

図書
図書
8. Proceedings : 1998 Fourth International Symposium on High-Performance Computer Architecture : February 1-4, 1998, Las Vegas, Nevada (: paper ; case ; : microfiche)
sponsored by the IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Cailf : IEEE Computer Society Press, c1998  xii, 352 p. ; 28 cm
所蔵情報: loading…
9.

図書
図書
9. Proceedings, 1997 International Conference on Parallel Architectures and Compilation Techniques, San Francisco, Calfornia, November 10-14, 1997
sponsors IFIP WG 10.3, IEEE Computer Society, ACM SIGARCH
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1997  ix, 319 p. ; 28 cm
所蔵情報: loading…
10.

図書
図書
10. Proceedings, Fifth International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, January 12-15, 1997, Haifa, Israel
sponsored by the IEEE Computer Society, IEEE Computer Society Technical Committee on Computer Architecture, IEEE Computer Society Technical Committee on Simulation
出版情報: Los Alamitos : IEEE Computer Society Press, c1997  xii, 249 p. ; 28 cm
所蔵情報: loading…
文献の複写および貸借の依頼を行う
 文献複写・貸借依頼