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1.

図書
図書
1. High-speed computing, digital signal processing, and filtering using reconfigurable logic : 20-21 November 1996, Boston, Massachusetts
John Schewel, ... [et al.], chairs/editors ; sponsored ... by SPIE--the International Society for Optical Engineering
出版情報: Bellingham, Wash., USA : SPIE, c1996  x, 354 p. ; 28 cm
シリーズ名: Proceedings / SPIE -- the International Society for Optical Engineering ; v. 2914
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2.

図書
図書
2. Reconfigurable technology : FPGAs for computing and applications ([1] ; 2)
John Schewel ... [et al.], chairs/editors ; sponsored and published by SPIE--the International Society for Optical Engineering
出版情報: Bellingham, Wash. : SPIE, c1999-  v. ; 28 cm
シリーズ名: Proceedings / SPIE -- the International Society for Optical Engineering ; v. 3844, 4212
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3.

図書
図書
3. Field programmable logic and applications : 9th International Workshop, FPL '99, Glasgow, UK, August 30 - September 1, 1999 : proceedings
Patrick Lysaght, James Irvine, Reiner Hartenstein (eds.)
出版情報: Berlin : Springer-Verlag, c1999  xi, 541 p. ; ill. : 24 cm
シリーズ名: Lecture notes in computer science ; 1673
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目次情報: 続きを見る
Signal Processing
Reconfigurable Processors for High-Performance, Embedded Digital Signal Processing / P. Graham ; B. Nelson
Auditory Signal Processing in Hardware: A Linear Gammatone Filterbank Design for a Model of the Auditory System / M. Brucke ; A. Schulz ; W. Nebel
SONIC - A Plug-In Architecture for Video Processing / S. D. Haynes ; P. Y. K.Cheung ; W. Luk ; J. Stone
CAD Tools for DRL
DRIVE: An Interpretive Simulation and Visualization Environment for Dynamically Reconfigurable Systems / K. Bondalapati ; V. K. Prasanna
Modelling and Synthesis of Configuration Controllers for Dynamically Reconfigurable Logic Systems Using the DCS CAD Framework / D. Robinson ; P. Lysaght
Optimization Studies
Optimal Finite Field Multipliers for FPGAs / G. C. Ahlquist ; M. Rice
Memory Access Optimization and RAM Inference for Pipeline Vectorization / M. Weinhardt
Analysis and Optimization of 3-D FPGA Design Parameters / S. M. S. A. Chiricescu ; M. M. Vai
Physical Design
Tabu Search: Ultra-Fast Placement for FPGAs / J. M. Emmert ; D. K. Bhatia
Placement Optimization Based on Global Routing Updating for System Partitioning onto Multi-FPGA Mesh Topologies / J. de Vicente ; J. Lanchares ; R. Hermida
Hierarchical Interactive Approach to Partition Large Designs into FPGAs / H. Krupnova ; G. Saucier
Logical-to-Physical Memory Mapping for FPGAs with Dual-Port Embedded Arrays / W. K. C. Ho ; S. J. E. Wilton
Dynamically Reconfigurable Logic
DYNASTY: A Temporal Floorplanning Based CAD Framework for Dynamically Reconfigurable Logic Systems / M. Vasilko
A Bipartitioning Algorithm for Dynamic Reconfigurable Programmable Logic / E. Cantó ; J. M. Moreno ; J. Cabestany ; J. Faura ; J. M. Insenser
Self Controlling Dynamic Reconfiguration: A Case Study / G. McGregor
Design Tools
An Internet Based Development Framework for Reconfigurable Computing / R. W. Hartenstein ; M. Herz ; U. Nageldinger ; T. Hoffmann
On Tool Integration in High-Performance FPGA Design Flows / A. Koch
Hardware-Software Codesign for Dynamically Reconfigurable Architectures / K. S. Chatha ; R. Vemuri
Reconfigurable Computing
Serial Hardware Libraries for Reconfigurable Designs / A. Derbyshire ; S. Guo ; D. Siganos
Reconfigurable Computing in Remote and Harsh Environments / G. Brebner ; N. Bergmann
Communication Synthesis for Reconfigurable Embedded Systems / M. Eisenring ; M. Platzner ; L. Thiele
Run-Time Parameterizable Cores / S. A. Guccione ; D. Levi
Applications
Rendering PostScriptÖ Fonts on FPGAs / D. MacVicar ; J. W. Patterson ; S. Singh
Implementing PhotoshopÖ Filters in VirtexÖ / S. Ludwig ; R. Slous
Rapid FPGA Prototyping of a DAB Test Data Generator Using Protocol Compiler / K. Feske ; M. Scholz ; G. Döring ; D. Nareike
Quantitative Analysis of Run-Time Reconfigurable Database Search / N. Shirazi ; D. Benyamin ; P. Y. K. Cheung
Novel Architectures
An On-Line Arithmetic Based FPGA for Low-Power Custom Computing / A. Tisserand ; P. Marchal ; C. Piguet
A New Switch Block for Segmented FPGAs / M. I. Masud
PulseDSP - A Signal Processing Oriented Programmable Architecture / G. Jones
Machine Applications
FPGA Viruses / I. Had&zbreve;ić ; S. Udani ; J. M. Smith
Genetic Programming Using Self-Reconfigurable FPGAs / R. P. S. Sidhu ; A. Mei
Specification, Implementation and Testing of HFSMs in Dynamically Reconfigurable FPGAs / A. Oliveira ; A. Melo ; V. Sklyarov
Synthia : Synthesis of Interacting Automata Targeting LUT-based FPGAs / G. A. Constantinides
Short Papers
An FPGA-based Prototyping System for Real-Time Verification of Video Processing Schemes / H. Kropp ; C. Reuter ; M. Wiege ; T.-T. Do ; P. Pirsch
An FPGA Implementation of Goertzel Algorithm / T. Dulik
Pipelined Multipliers and FPGA Architectures / M. Wojko
FPGA Design Trade-Offs for Solving the Key Equation in Reed-Solomon Decoding / E. M. Popovici ; P. Fitzpatrick ; C. C. Murphy
Reconfigurable Multiplier for Virtex FPGA Family / J. Põldre ; K. Tammemäe
Pipelined Floating Point Arithmetic Optimized for FPGA Architectures / I. Stamoulis ; M. White ; P. F. Lister
SL - A Structural Hardware Design Language / S. Holmström
High-Level Hierarchical HDL Synthesis of Pipelined FPGA-Based Circuits Using Synchronous Modules / R. B. Maunder ; Z. A. Salcic ; G. G. Coghill
Mapping Applications onto Reconfigurable KressArrays / R. Hartenstein
Global Routing Models / M. Dan&ebreve;k ; Z. Muziká&rbreve;
Power Modelling in Field Programmable Gate Arrays (FPGA) / A. Garcia ; W. Burleson ; J.-L. Danger
NEBULA: A Partially and Dynamically Reconfigurable Architecture / D. Bhatia ; K. S. Simha ; P. Kannan
High Bandwidth Dynamically Reconfigurable Architectures Using Optical Interconnects / K. J. Symington ; J. F. Snowdon ; H. Schroeder
AHA-GRAPE: Adaptive Hydrodynamic Architecture - GRAvity PipE / T. Kuberka ; A. Kugel ; R. Mäanner ; H. Singpiel ; R. Spurzem ; R. Klessen
DIME - The First Module Standard for FPGA Based High Performance Computing / M. Devlin ; A.J.Cantle
The Proteus Processor - A Conventional CPU with Reconfigurable Functionality / M. Dales
Logic Circuit Speeding up through Multiplexing / V. F. Tomashau
A Wildcarding Mechanism for Acceleration of Partial Configurations / P. James-Roxby ; E. Cerro-Prada
Hardware Implementation Techniques for Recursive Calls and Loops / T. Maruyama ; M. Takagi ; T. Hoshino
A HW/SW Codesign-Based Reconfigurable Environment for Telecommunication Network Simulation / J. Noguera ; R. M. Badia ; J. Domingo ; J. Solé-Pareta
An Alternative Solution for Reconfigurable Coprocessors Hardware and Interface Synthesis / M. D. Valdés ; M. J. Moure ; E. Mandado ; A. Salaverría
Reconfigurable Programming in the Large on Extendable Uniform Reconfigurable Computing Array's: An Integrated Approach Based on Reconfigurable Virtual Architectures / A. Touhafi ; W. Brissinck ; E. F. Dirkx
A Concept for an Evaluation Framework for Reconfigurable Systems / S. Sawitzki ; R. G. Spallek
Debugging Application-Specific Programmable Products / R. Kress ; A. Pyttel
IP Validation for FPGAs Using Hardware Object TechnologyÖ / S. Casselman ; J. Schewel ; C. Beaumont
A Processor for Artificial Life Simulation / M. Böge
A Distributed, Scalable, Multi-Layered Approach to Evolvable System Design Using FPGA's / C. Slorach ; S. Fulton ; K. Sharman
Dynamically Reconfigurable Reduced Crossbar: A Novel Approach to Large Scale Switching / T. Caohuu ; T. Trong Le ; M. Glesner ; J. Becker
A Reconfigurable Architecture for High Speed Computation by Pipeline Processing
Seeking (the right) Problems for the Solutions of Reconfigurable Computing / B. Kastrup ; J. van Meerbergen ; K. Nowak
A Runtime Reconfigurable Implementation of the GSAT algorithm / H. Y. Wong ; W. S. Yuen ; K. H. Lee ; P. H. W. Leong
Accelerating Boolean Implications with FPGAs / K. Sulimma ; D. Stoffel ; W. Kunz
Author Index
Signal Processing
Reconfigurable Processors for High-Performance, Embedded Digital Signal Processing / P. Graham ; B. Nelson
Auditory Signal Processing in Hardware: A Linear Gammatone Filterbank Design for a Model of the Auditory System / M. Brucke ; A. Schulz ; W. Nebel
4.

図書
図書
4. FPGA '99 : ACM/SIGDA International Symposium on Field Programmable Gate Arrays
sponsored by the ACM Special Interest Group on Design Automation (SIGDA) with support from Xilinx, Altera, Actel, Vantis and Lucent Technologies
出版情報: New York : the Association for Computing Machinery, c1999  vii, 257 p. ; 28 cm
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5.

図書
図書
5. Field-programmable logic and applications : 7th International Workshop, FPL '97, London, UK, September 1-3, 1997 : proceedings
Wayne Luk, Peter Y.K. Cheung, Manfred Glesner (eds.)
出版情報: Berlin ; Tokyo : Springer-Verlag, c1997  xi, 503 p. ; ill. : 24 cm
シリーズ名: Lecture notes in computer science ; 1304
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6.

図書
図書
6. Proceedings : the 5th annual IEEE Symposium on Field-Programmable Custom Computing Machines, April 16-18, 1997, Napa Valley, California (: case)
sponsored by IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1997  x, 250 p. ; 28 cm
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7.

図書
図書
7. Proceedings IEEE Symposium on FPGAs for Custom Computing Machines, April 15-17, 1998, Napa Valley, California
sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; edited by Kenneth L. Pocek and Jeffrey Arnold
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1998  x, 344 p. ; 28 cm
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8.

図書
図書
8. Field-programmable logic and applications : from FPGAs to computing paradigm : 8th International Workshop, FPL '98, Tallinn, Estonia, August 31-September 3, 1998, proceedings
Reiner W. Hartenstein, Andres Keevallik (eds.)
出版情報: Berlin ; Tokyo : Springer-Verlag, c1998  xi, 533 p. ; ill. : 24 cm
シリーズ名: Lecture notes in computer science ; 1482
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目次情報: 続きを見る
Table of Contents Design Methods New CAD Framework Extends Simulation of Dynamically Reconfigurable Logic / Robinson, D. ; McGregor, G. ; Lysaght, P. Pebble
A Language For Parametrised and Reconfigurable Hardware Design / Luk, W ; McKeeer, S
Integrated Development Environment for Logic Synthesis Based on Dynamically Reconfigurable FPGAs / Sklyarov, V. ; Sal Monteiro, R. ; Lau, N. ; Melo, A. ; Oliveira, A. ; Kondratjuk, K
Designing for Xilinx XC6200 FPGAs / Hartenstein, R.W. ; Herz, M. ; Gilbert, F
General Aspects Perspectives of Reconfigurable Computing in Research, Industry and Education / Becker, J. ; Kirschbaum, A. ; Renner, F.-M. ; Glesner, M
Field-Progammable Logic: Catalyst for New Computing Paradigms / Brebner G
Run-Time Management of Dynamically Reconfigurable Designs / Shirazi, N. ; Luk, W. ; Cheung, P.Y.K
Acceleration of Satisfiability Algorithms by Reconfigurable Hardware / Platzner, M. ; De Micheli G
Prototyping / Simulation An Optimized Design Flow for Fast FPGA-Based Rapid Prototyping / Stohmann, J. ; Harbich, K. ; Olbrich, M. ; Barke, E
A Knowledge-Based System for Prototyping on FPGAs / Krupnova, H. ; DucAnh Dinh, V. ; Saucier, G
JVX - A Rapid Prototyping System Based on Java and FPGAs / Macketanz, R. ; Karl, W
Prototyping New ILP Architectures Using FPGAs / Shetler, J. ; Hemme, B. ; Yang, C. ; Hinsz, C
Development Methods CAD System for ASM and FSM Synthesis / Baranov S
Fast Floorplanning for FPGAs / Emmert, J.M. ; Randhar, A. ; Bhatia, D
SRAM-Based FPGAs
A Fault Model for the Configurable Logic Modules / Renovell, M. ; Portal, J.M. ; Figueras, J. ; Zorian, Y
Reconfigurable Hardware as Shared Resource in Multipurpose Computers / Haug, G. ; Rosenstiel, W
Accelerators Reconfigurable Computer Array: The Bridge between High Speed Sensors and Low Speed Computing / Robinson, S.H. ; Caffrey, M.P. ; Dunham, M.E
A Reconfigurable Engine for Real-Time Video Processing / Andreou, P. ; Derbyshire, A. ; Dupont-De-Dinechin, F. ; Rice, J. ; Siganos, D
An FPGA Implementation of a Magnetic Bearing Controller for Mechatronic Applications System Architectures
Exploiting Contemporary Memory Techniques in Reconfigurable Accelerators / Hoffmann, T. ; Nageldinger, U
Self Modifying Circuitry - A Platform for Tractable Virtual Circuitry Donlin
A. REACT: Reactive Environment for Runtime Reconfiguration / Bhatia, D. ; Kannan, P. ; Simha, K.S. ; GajjalaPurna, K.M
Applications (1) Evaluation of the XC6200-series Architecture for Cryptographic Applications / Charlwood, S. ; James-Roxby P
An FPGA Based Object Recognition Machine / Zakerolhosseini, A. ; Lee, P. ; Horne, E
PCI-SCI Protocol Translations: Applying Microprogramming Concepts to FPGAs / Acher, G. ; Karl, W. ; Leberecht, M
Instruction-Level Parallelism for Reconfigurable Computing / Callahan, T.J. ; Wawrzynek, J
Hardware/Software Codesign
A Hardware/Software Co-design E
Environment for Reconfigurable Logic Systems / Lysaght, P
Mapping Loops onto Reconfigurable Architectures / Bondalapati, K. ; Prasanna, V.K
Speed Optimization of the ALR Circuit Using an FPGA with Embedded RAM: A Design Experience / Asaad, S. ; Warren, K
System Development High-Level Synthesis for Dynamically Reconfigurable Hardware/Software Systems / Kress, R. ; Pyttel, A
Dynamic Specialisation of XC6200 FPGAs by Partial Evaluation / McKay, N. ; Singh, S
Webscope: A Circuit Debug Tool Guccione
S.A. Algorithms on FPGAs Computing Goldbach Partitions Using Pseudo-random Bit Generator Operators on a FPGA Systolic Array / Lavenier, D. ; Saouter, Y
Solving Boolean Satisfiability with Dynamic Hardware Configurations / Zhong, P. ; Martonosi, M. ; Ashar, P. ; Malik, S
Modular Exponent Realization on FPGAs / Poldre, J. ; Tammemae, K.;cMandre, M
Cost Effective 2x2 Inner Product Processors / Fehr, B. ; Szed, G
Applications (2) A Field-Programmable Gate-Array System for Evolutionary Computation / Maruyama, T. ; Funatsu, T. ; Hoshino, T. A Transmutable Telecom System ; Miyazaki, T. ; Shirakawa, K. ; Katay"
Table of Contents Design Methods New CAD Framework Extends Simulation of Dynamically Reconfigurable Logic / Robinson, D. ; McGregor, G. ; Lysaght, P. Pebble
A Language For Parametrised and Reconfigurable Hardware Design / Luk, W ; McKeeer, S
Integrated Development Environment for Logic Synthesis Based on Dynamically Reconfigurable FPGAs / Sklyarov, V. ; Sal Monteiro, R. ; Lau, N. ; Melo, A. ; Oliveira, A. ; Kondratjuk, K
9.

図書
図書
9. Proceedings : IEEE Symposium on FPGAs for Custom Computing Machines, April 17-19, 1996, Napa Valley, California
sponsored by IEEE Computer Society Technical Committee on Computer Architecture ; edited by Kenneth L. Pocek and Jeffrey Arnold
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1996  viii, 235 p. ; 28 cm
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10.

図書
図書
10. Field-programmable logic : smart applications, new paradigms, and compilers : 6th International Workshop on Field-Programmable Logic and Applications, FPL '96, Darmstadt, Germany, September 23-25, 1996 : proceedings
Reiner W. Hartenstein, Manfred Glesner (eds.)
出版情報: Berlin ; Tokyo : Springer, c1996  x, 432 p. ; 24 cm
シリーズ名: Lecture notes in computer science ; 1142
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