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1.

図書
図書
1. Proceedings : HPCA : the seventh International Symposium on High-Performance Computer Architecture, 19-24 January, 2001, Monterrey, Nuevo Leon, México
sponsored by the IEEE Computer Society Technical Committee on Computer Architecture
出版情報: Los Alamitos, Cailf. : IEEE Computer Society Press, c2001  xvi, 318 p. ; 28 cm
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Message from the Chairs
Organizing Committee
Program Committee
Reviewers
Microarchitecture I
Stack Value File: Custom Microarchitecture for the Stack / H.-H. S. Lee ; M. Smelyanskiy ; C. J. Newburn ; G. S. Tyson
Register Renaming and Scheduling for Dynamic Execution of Predicated Code / P. H. Wang ; H. Wang ; R. M. Kling ; K. Ramakrishnan ; J. P. Shen
Data-Flow Prescheduling for Large Instruction Windows in Out-of-Order Processors / P. Michaud ; A. Seznec
Speculative Data-Driven Multithreading / A. Roth ; G. S. Sohi
Memory Architectures
Towards Virtually-Addressed Memory Hierarchies / X. Qiu ; M. Dubois
Reevaluating Online Superpage Promotion with Hardware Support / Z. Fang ; L. Zhang ; J. B. Carter ; W. C. Hsieh ; S. A. McKee
Performance of Hardware Compressed Main Memory / B. Abali ; H. Franke ; X. Shen ; D. E. Poff ; T. B. Smith
Multiprocessor Systems
JETTY: Filtering Snoops for Reduced Energy Consumption in SMP Servers / A. Moshovos ; G. Memik ; B. Falsafi ; A. Choudhary
A New Scalable Directory Architecture for Large-Scale Multiprocessors / M. E. Acacio ; J. Gonzalez ; J. M. Garcia ; J. Duato
Self-Tuned Congestion Control for Multiprocessor Networks / M. Thottethodi ; A. R. Lebeck ; S. S. Mukherjee
Code Generation Techniques
Automatically Mapping Code on an Intelligent Memory Architecture / J. Lee ; Y. Solihin ; J. Torrellas
CARS: A New Code Generation Framework for Clustered ILP Processors / K. Kailas ; K. Ebcioglu ; A. Agrawala
Energy and Thermal Management
An Integrated Circuit/Architecture Approach to Reducing Leakage in Deep-Submicron High-Performance I-Caches / S.-H. Yang ; M. D. Powell ; K. Roy ; T. N. Vijaykumar
DRAM Energy Management Using Software and Hardware Directed Power Mode Control / V. Delaluz ; M. Kandemir ; N. Vijaykrishnan ; A. Sivasubramaniam ; M. J. Irwin
Dynamic Thermal Management for High-Performance Microprocessors / D. Brooks ; M. Martonosi
Prediction Techniques
Dynamic Prediction of Critical Path Instructions / E. Tune ; D. Liang ; D. M. Tullsen ; B. Calder
Dynamic Branch Prediction with Perceptrons / D. A. Jimenez ; C. Lin
Differential FCM: Increasing Value Prediction Accuracy by Improving Table Usage Efficiency / B. Goeman ; H. Vandierendonck ; K. De Bosschere
Application-Specific Designs
DLP + TLP Processors for the Next Generation of Media Workloads / J. Corbal ; R. Espasa ; M. Valero
An Architectural Evaluation of Java TPC-W / H. W. Cain ; R. Rajwar ; M. Marden ; M. H. Lipasti
A Programmable Co-Processor for Profiling / C. B. Zilles
Performance Modeling and Analysis
A Delay Model and Speculative Architecture for Pipelined Routers / L.-S. Peh ; W. J. Dally
Quantifying the Impact of Architectural Scaling on Communication / T. Heath ; S. Kaur ; R. P. Martin ; T. D. Nguyen
Latency Tolerance Techniques
Call Graph Prefetching for Database Applications / M. Annavaram ; J. M. Patel ; E. S. Davidson
Branch History Guided Instruction Prefetching / V. Srinivasan ; M. J. Charney ; T. R. Puzak
Reducing DRAM Latencies with an Integrated Memory Hierarchy Design / W. Lin ; S. K. Reinhardt ; D. Burger
Workshops
Interact-V: Workshop on Interaction between Compilers and Computer Architectures / G. Lee ; P.-C. Yew
Fourth Workshop on Computer Architecture Evaluation using Commercial Workloads / A. Nanda ; R. Clapp
Workshop on Microprocessors for Networks and Communications / I. Spillinger ; M. Nemirovsky
Tutorials
VIA and InfiniBand Communication Architecture / D. K. Panda
Power-Performance Modeling, Analyis and Validation / P. Bose
Author Index
Message from the Chairs
Organizing Committee
Program Committee
2.

図書
図書
2. Proceedings, ninth International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems, 15-18 August 2001, Cincinnati, Ohio
sponsored by IEEE Computer Society Technical Committee on Simulation, IEEE Computer Society Technical Committee on Computer Architecture ; in cooperation with ACM SIGSIM, ACM SIGARCH
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2001  xii, 432 p. ; 28 cm
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Message from the General Chair
Message from the Program Chair
Conference Organizers
Program Committee
Opening Remarks / Dr. Anthony Perzigian
Keynote Speech
High-Volume Web Servers: Traffic Patterns, Performance Implications and Resource Management / Dr. Mark S. Squillante
Real Time Systems
Specification and Validation of a Real-Time Parallel Kernel Using LOTOS / C. de Farias ; L. Pires ; W. de Souza ; C. Moron
Performance Analysis of Pools in Soft Real-Time Design Architectures / C. Juiz ; R. Puigjaner ; H. Perros
Dynamic Multipath Routing (DMPR): An Approach to Improve Resource Utilization in Networks for Real-Time Traffic / S. De ; S. Das
Parallel and Distributed Simulation
An Evaluation of Grouping Techniques for State Dissemination in Networked Multi-User Games / L. Zou ; M. Ammar ; C. Diot
Effect of Event Orderings on Memory Requirement in Parallel Simulation / Y. Teo ; B. Onggo ; S. Tay
Time-Parallel Algorithms for Simulation of Multiple Access Protocols / K. Jones
Capacity Planning
Optimal Resource Assignment in Internet Data Centers / X. Zhu ; S. Singhal
Traffic Engineering Label Switched Paths in IP Networks using a Pre-Planned Flow Optimization Model / A. Bagula ; A. Krzesinski
Wireless
QoS for Adaptive Multimedia in Wireless/Mobile Networks / Y. Xiao ; C. Chen
MoSync: A Synchronization Scheme for Cellular Wireless and Mobile Multimedia Systems / A. Boukerche ; S. Hong ; T. Jacob
Routing
Performance Study of a Multipath Routing Method for Wireless Mobile Ad Hoc Networks / K. Wu ; J. Harms
Minimizing Routing State for Light-Weight Network Simulation / P. Huang ; J. Heidemann
Non-Blocking, Localized Routing Algorithm for Balanced Energy Consumption in Mobile Ad Hoc Networks / K. Woo ; C. Yu ; D. Lee ; H. Youn ; B. Lee
Stability Analysis on Active Queue Management Algorithms in Routers / W. Wu ; Y. Ren ; X. Shan
Network Simulation/Emulation
ANML: A Language for Describing Networks / C. Kiddle ; R. Simmonds ; D. Wilson ; B. Unger
Mulit-Resolution Network Simulations Using Dynamic Component Substitution / D. Rao ; P. Wilsey
Packet Reading for Network Emulation / R. Bradford
Split Protocol Stack Network Simulations Using the Dynamic Simulation Backplane / D. Xu ; G. Riley ; R. Fujimoto
Design--Why We Don't Do It Right / Dr. John Hines
Modeling
Low-Cost Performance Prediction of Data-Dependent Data Parallel Programs / H. Gautama ; A. van Gemund
A Modular, Analytical Throughput Model for Modern Disk Arrays / M. Uysal ; G. Alvarez ; A. Merchant
Performing File Prediction with a Program-Based Successor Model / T. Yeh ; D. Long ; S. Brandt
Network Traffic
Improving Ensemble-TCP Performance on Asymmetric Networks / Q. Wu ; C. Williamson
How Does TCP Generate Pseudo-Self-Similarity? / L. Guo ; M. Crovella ; I. Matta
Generalized Processor Sharing with Long-Range Dependent Traffic Input / X. Yu ; L-J. Thng ; Y. Jiang
Benchmarking
Plain End-to-End Measurement for Local Area Network Voice Transmission Feasibility / W. Kampichler ; K. Goeschka
Tuning of the Checkpointing and Communication Library for Optimistic Simulation on Myrinet Based NOWs / F. Quaglia ; A. Santoro ; B. Ciciani
Performance of Finite Field Arithmetic in an Elliptic Curve Cryptosystem / J. Higgins ; Z. Li ; M. Clement
Switching
AQueueing Model for Pipelined Circuit-Switched Networks with the MMPP Traffic / G. Min ; M. Ould-Khaoua
Service Guarantees in Deflection Networks / W. Olesinski ; P. Gburzynski
Analysis of Timeout-Based Adaptive Wormhole Routing / H. Sarbazi-Azad ; A. Khonsari
File Systems
PROFS--Performance-Oriented Data Reorganization for Log-Structured File System on Multi-Zone Disks / J. Wang ; Y. Hu
Aggregating Caches: A Mechanism for Implicit File Prefetching / A. Amer
A Bit-Parallel Search Algorithm for Allocating Free Space / R. Burns ; W. Hineman
Large-Scale Simulation of Replica Placement Algorithms for a Serverless Distributed File System / J. Douceur ; R. Wattenhofer
Tools
Parameterized Mobile Action Generator for a Wireless PCS Network / S-E. Park ; C. Purdy
On-Line Test System Applied in Routing Protocol Test / Y. Zhao ; X. Yin ; B. Han ; J. Wu
PTPlan MPLS: A Tool for MPLS Network Dimensioning / L. Cardoso ; J. Patrao ; C. Lopes ; A. de Sousa ; R. Valadas
BRITE: An Approach to Universal Topology Generation / A. Medina ; A. Lakhina ; J. Byers
On-Line Simulation Techniques for Real-Time Management of Systems / Dr. Richard Fujimoto
WWW
The Structural Cause of File Size Distributions / A. Downey
A Simulation Analysis of Dynamic Server Selection Algorithms for Replicated Web Services / M. Bernardo
Simulation Evaluation of a Heterogeneous Web Proxy Caching Hierarchy / M. Busari
HTTP Simulator Validation Using Real Measurements: A Case Study / B. Davison
Broadband
Performance Evaluation Based on an Aggregate ATM Model / S. Galmes
Modeling and Analysis of an ABR Flow Control Algorithm for a Virtual Source/Virtual Destination Switch / C. Cseh
On Class-Based Isolation of UDP, Short-Lived and Long-Lived TCP Flows / S. Yilmaz
A Stream Tapping Protocol with Partial Preloading / J-F. Paris
Author Index
Message from the General Chair
Message from the Program Chair
Conference Organizers
3.

図書
図書
3. Proceedings, 2001 International Conference on Parallel Architectures and Compilatin Techniques, 8-12 September 2001, Barcelona, Catalunya, Spain (: pbk)
Sponsored by IEEE Computer Society Technical Committee on Computer Architecture, IEEE Computer Society Technical Commitee on Parallel Processing, ACM SIGARCH, IFIP Working Group 10.3 ; with the support of Technical University of Catalunya (UPC) ... [et al.]
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2001  x, 305 p. ; 28 cm
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General Chair's Message
Conference Organizers
Program Committee
Keynote Address / Randall D. Isaac
Simulation and Modeling / Session 1：
Basic Block Distribution Analysis to Find Periodic Behavior and Simulation Points in Applications / T. Sherwood ; E. Perelman ; B. Calder
Modeling Superscalar Processors via Statistical Simulation / S. Nussbaum ; J. Smith
Hybrid Analytical-Statistical Modeling for Efficiently Exploring Architecture and Workload Design Spaces / L. Eeckhout ; K. De Bosschere
Efficient Caches / Session 2：
Filtering Techniques to Improve Trace-Cache Efficiency / R. Rosner ; A. Mendelson ; R. Ronen
Reactive-Associative Caches / B. Batson ; T. Vijaykumar
Adaptive Mode Control: A Static-Power-Efficient Cache Design / H. Zhou ; M. Toburen ; E. Rotenberg ; T. Conte
Specialized Instruction Sets / Session 3：
Implementation and Evaluation of the Complex Streamed Instruction Set / B. Juurlink ; D. Tcheressiz ; S. Vassiliadis ; H. Wijshoff
On the Efficiency of Reductions in [mu]-SIMD Media Extensions / J. Corbal ; R. Espasa ; M. Valero
Prediction and Recovery / Justin RattnerSession 4：
Boolean Formula-Based Branch Prediction for Future Technologies / D. Jimenez ; H. Hanson ; C. Lin
Using Dataflow Based Context for Accurate Value Prediction / R. Thomas ; M. Franklin
Recovery Mechanism for Latency Misprediction / E. Morancho ; J. Maria Llaberia ; A. Olive
Memory Optimization / Session 5：
A Cost Framework for Evaluating Integrated Restructuring Optimizations / B. Chandramouli ; J. Carter ; W. Hsieh ; S. McKee
Compiling for the Impulse Memory Controller / X. Huang ; Z. Wang ; K. McKinley
On the Stability of Temporal Data Reference Profiles / T. Chilimbi
Program Optimization / Session 6：
Code Reordering and Speculation Support for Dynamic Optimization Systems / E. Nystrom ; R. Barnes ; M. Merten ; W-M. Hwu
A Unified Modulo Scheduling and Register Allocation Technique for Clustered Processors / J. Codina ; J. Sanchez ; A. Gonzalez
Cache-Friendly Implementations of Transitive Closure / M. Penner ; V. Prasanna
Technology Implications / Session 7：
Exploring the Design Space of Future CMPs / J. Huh ; D. Burger ; S. Keckler
Area and System Clock Effects on SMT/CMP Processors / J. Burns ; J-L. Gaudiot
Parallel Machines / Joel EmerSession 8：
Limits on Speculative Module-Level Parallelism in Imperative and Object-Oriented Programs on CMP Platforms / F. Warg ; P. Stenstrom
Compiler and Runtime Analysis for Efficient Communication in Data Intensive Applications / R. Ferreira ; G. Agrawal ; J. Saltz
Architectural Support for Parallel Reductions in Scalable Shared-Memory Multiprocessors / M. Garzaran ; M. Prvulovic ; Y. Zhang ; A. Jula ; H. Yu ; L. Rauchwerger ; J. Torrellas
Data Prefetching / Session 9：
Optimizing Software Data Prefetches with Rotating Registers / G. Doshi ; R. Krishnaiyer ; K. Muthukumar
Multi-Chain Prefetching: Effective Exploitation of Inter-Chain Memory Parallelism for Pointer-Chasing Codes / N. Kohout ; S. Choi ; D. Kim ; D. Yeung
Data Flow Analysis for Software Prefetching Linked Data Structures in Java / B. Cahoon
Comparing and Combining Read Miss Clustering and Software Prefetching / V. Pai ; S. Adve
Author Index
General Chair's Message
Conference Organizers
Program Committee
4.

図書
図書
4. Proceedings : 28th Annual International Symposium on Computer Architecture, June 30-July 4, 2001, Göteborg, Sweden
sponsored by IEEE Computer Society Technical Committee on Computer Architecture, Association for Computing Machinery SIGARCH
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2001  xi, 291 p. ; 28 cm
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General Chair's Message
Program Chair's Message
Conference Organization
Reviewers
Plenary Session
Opening Remarks
Keynote Speech: Greg Papadopoulos, CTO, Sun Microsystems Inc., USA
Multithreading and Speculation / Session 1：
Execution-based Prediction Using Speculative Slices / C. Zilles ; G. Sohi
Speculative Precomputation: Long-range Prefetching of Delinquent Loads / J. Collins ; H. Wang ; D. Tullsen ; C. Hughes ; Y. Lee ; D. Lavery ; J. Shen
Dynamically Allocating Processor Resources between Nearby and Distant ILP / R. Balasubramonian ; S. Dwarkadas ; D. Albonesi
Memory System Issues / Session 2：
Tolerating Memory Latency through Software-Controlled Pre-Execution in Simultaneous Multithreading Processors / C. Luk
Data Prefetching by Dependence Graph Precomputation / M. Annavaram ; J. Patel ; E. Davidson
Concurrency, Latency, or System Overhead: Which Has the Largest Impact on Uniprocessor DRAM-System Performance? / V. Cuppu ; B. Jacob
Processor Architecture / Session 3：
Focusing Processor Policies via Critical-Path Prediction / B. Fields ; S. Rubin ; R. Bodik
Automated Design of Finite State Machine Predictors for Customized Processors / T. Sherwood ; B. Calder
Better Exploration of Region-Level Value Locality with Integrated Computation Reuse and Value Prediction / Y. Wu ; D. Chen ; J. Fang
Communication Support / Session 4：
CryptoManiac: A Fast Flexible Architecture for Secure Communication / L. Wu ; C. Weaver ; T. Austin
QoS Provisioning in Clusters: An Investigation of Router and NIC Design / K. Yum ; E. Kim ; C. Das
Cache Management / Session 5：
Locality vs. Criticality / S. Srinivasan ; R. Ju ; A. Lebeck ; C. Wilkerson
Dead-Block Prediction and Dead-Block Correlating Prefetchers / A. Lai ; C. Fide ; B. Falsafi
Code Layout Optimizations for Transaction Processing Workloads / A. Ramirez ; L. Barroso ; K. Gharachorloo ; R. Cohn ; J. Larriba-Pey ; P. Lowney ; M. Valero
Architectural Impact of Emerging Technologies / Session 6A：
Exploring and Exploiting Wire-Level Pipelining in Emeging Technologies / M. Niemier ; P. Kogge
NanoFabrics: Spatial Computing Using Molecular Electronics / S. Goldstein ; M. Budiu
Shared-Memory Multiprocessors / Session 6B：
A Simple Method for Extracting Models from Protocol Code / D. Lie ; A. Chou ; D. Engler ; D. Dill
Removing Architectural Bottlenecks to the Scalability of Speculative Parallelization / M. Prvulovic ; M. Garzaran ; L. Rauchwerger ; J. Torrellas
Energy-Effective Designs / Session 7：
Power and Energy Reduction Via Pipeline Balancing / R. Bahar ; S. Manne
Energy-Effective Issue Logic / D. Folegnani ; A. Gonzalez
Cache Decay: Exploiting Generational Behavior to Reduce Cache Leakage Power / S. Kaxiras ; Z. Hu ; M. Martonosi
Performance Tools and Evaluations / Session 8：
Variability in the Execution of Multimedia Applications and Implications for Architecture / P. Kaul ; S. Adve ; R. Jain ; C. Park ; J. Srinivasan
Measuring Experimental Error in Microprocessor Simulation / R. Desikan ; D. Burger ; S. Keckler
Rapid Profiling via Stratified Sampling / S. Sastry ; J. Smith
Author Index
General Chair's Message
Program Chair's Message
Conference Organization
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