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1.

図書

図書
[sponsored by the IEEE Computer Society Test Technology Technical Council, the IEEE Computer Society Technical Committee on Fault-Tolerant Computing]
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2002  xiii, 441 p. ; 23 cm
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目次情報: 続きを見る
Message from the Symposium Chairs
Organizing Committee
Program Committee
Yield I / Session 1:
Manufacturability Analysis of Analog CMOS ICs Through Examination of Multiple Layout Solutions / P. Khademsameni ; M. Syrzycki
Effect of Static Power Dissipation in Burn-In Environment on Yield of VLSI / A. Vassighi ; O. Semenov ; M. Sachdev ; A. Keshavarzi
Yield Estimates for the TESH Multicomputer Network / B. M. Maziarz ; V. K. Jain
Crosstalk Faults / Session 2:
A Simplified Gate-Level Fault Model for Crosstalk Effects Analysis / P. Civera ; L. Macchiarulo ; M. Violante
A Test-Vector Generation Methodology for Crosstalk Noise Faults / H. Hashempour ; Y.-B. Kim ; N. Park
Self-Checking and ABFT / Session 3:
A Parity Code Based Fault Detection for an Implementation of the Advanced Encryption Standard / G. Bertoni ; L. Breveglieri ; I. Koren ; P. Maistri ; V. Piuri
Designing Self-Checking FPGAs Through Error Detection Codes / C. Bolchini ; F. Salice ; D. Sciuto
Self-Checking 1-out-of-n CMOS Current-Mode Checker / J. Mathew ; E. Dubrova
Partially Duplicated Code-Disjoint Carry-Skip Adder / D. Marienfeld ; V. Ocheretnij ; M. Gossel ; E. S. Sogomonyan
Input Ordering in Concurrent Checkers to Reduce Power Consumption / K. Mohanram ; N. A. Touba
Fault Simulation and Injection I / Session 4:
New Methods for Evaluating the Impact of Single Event Transients in VDSM ICs / D. Alexandrescu ; L. Anghel ; M. Nicolaidis
Injecting Bit Flip Faults by Means of a Purely Software Approach: A Case Studied / R. Velazco ; A. Corominas ; P. Ferreyra
Gate-Delay Fault Diagnosis Using the Inject-and-Evaluate Paradigm / H.-B. Wang ; S.-Y. Huang ; J.-R. Huang
Scan Design / Session 5:
Scan Architecture for Shift and Capture Cycle Power Reduction / P. M. Rosinger ; B. M. Al-Hashimi ; N. Nicolici
Inserting Test Points to Control Peak Power During Scan Testing / R. Sankaralingam
Adaptable Voltage Scan Testing of Charge-Sharing Faults for Domino Circuits / C.-H. Cheng
Test Application / Session 6:
Matrix-Based Test Vector Decompression Using an Embedded Processor / K. J. Balakrishnan
Data Compression for System-on-Chip Testing Using ATE / F. Karimi ; W. Meleis ; Z. Navabi ; F. Lombardi
Test Generation / Session 7:
Fortuitous Detection and Its Impact on Test Set Sizes Using Stuck-At and Transition Faults / J. Dworak ; J. Wingfield ; B. Cobb ; S. Lee ; L.-C. Wang ; M. R. Mercer
Test Time Reduction in a Manufacturing Environment by Combining BIST and ATE / F. J. Meyer
Testing Digital Circuits with Constraints / A. A. Al-Yamani ; S. Mitra ; E. J. McCluskey
Concurrent Error Detection / Session 8:
On-Line Testing of Transient Faults Affecting Functional Blocks of FCMOS, Domino and FPGA-Implemented Self-Checking Circuits / C. Metra ; S. Di Francescantonio ; G. Marrale
Self-Checking and Fault Tolerance Quality Assessment Using Fault Sampling / F. M. Goncalves ; M. B. Santos ; I. C. Teixeira ; J. P. Teixeira
A Memory Overhead Evaluation of the Interleaved Signature Instruction Stream / F. Rodriguez ; J. C. Campelo ; J. J. Serrano
Fault-Tolerant CAM Architectures: A Design Framework / M. G. Sami ; R. Stefanelli
Fault Simulation and Injection II / Session 9:
Using Run-Time Reconfiguration for Fault Injection in Hardware Prototypes / L. Antoni ; R. Leveugle ; B. Feher
A Fault Hypothesis Study on the TTP/C Using VHDL-Based and Pin-Level Fault Injection Techniques / S. Blanc ; J. Gracia ; P. J. Gil
Fault List Compaction Through Static Timing Analysis for Efficient Fault Injection Experiments / M. Sonza Reorda
Interconnect / Session 10:
Performance of Deadlock-Free Adaptive Routing for Hierarchical Interconnection Network TESH / S. Horiguchi ; Y. Miura
Modeling of FPGA Local/Global Interconnect Resources and Derivation of Minimal Test Configurations / X. Sun ; A. Alimohammad ; P. Trouborst
Testing Layered Interconnection Networks
Yield II / Session 11:
Repair Yield Simulation with Iterative Critical Area Analysis for Different Types of Failure / Y. Hamamura ; K. Nemoto ; T. Kumazawa ; H. Iwata ; K. Okuyama ; S. Kamohara ; A. Sugimoto
Yield Modeling of a WSI Telcom Router Architecture / B. Qiu ; Y. Savaria ; M. Lu ; C. Wang ; C. Thibeault
System-on-Chip Test / Session 12:
Fast and Energy-Frugal Deterministic Test Through Test Vector Correlation Exploitation / O. Sinanoglu ; A. Orailoglu
Adaptive Test Scheduling in SoC's by Dynamic Partitioning / D. Zhao ; S. Upadhyaya
Feasibility of CED / Session 13:
Duplication-Based Concurrent Error Detection in Asynchronous Circuits: Shortcomings and Remedies / T. Verdel ; Y. Makris
Feasibility Study of Designing TSC Sequential Circuits with 100% Fault Coverage / S. J. Piestrak
Test / Session 14:
Emulation-Based Design Errors Identification / A. CasteInuovo ; A. Fin ; F. Fummi ; F. Sforza
A New Functional Fault Model for FPGA Application-Oriented Testing / M. Rebaudengo
Neighbor Current Ratio (NCR): A New Metric for I[subscript DDQ] Data Analysis / S. S. Sabade ; D. M. H. Walker
CMOS Standard Cells Characterization for I[subscript DDQ] Testing / W. A. Pleskacz ; T. Borejko ; W. Kuzmicz
On-Chip Jitter Measurement for Phase Locked Loops / T. Xia ; J.-C. Lo
Neural Networks-Based Parametric Testing of Analog IC / V. Stopjakova ; D. Micusik ; L. Benuskova ; M. Margala
Reliable and Repairable Memories / Session 15:
Balanced Redundancy Utilization in Embedded Memory Cores for Dependable Systems / M. Choi ; Y. B. Kim
Repairability Evaluation of Embedded Multiple Region DRAMs / Y. Chang
Author Index
TTTC Information
Message from the Symposium Chairs
Organizing Committee
Program Committee
2.

図書

図書
sponsored by IEEE Computer Society Technical Committee on Fault-Tolerant Computing, IEEE Computer Society Test Technology Technical Council
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2001  xiii, 468 p. ; 23 cm
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3.

図書

図書
edited by Robert Aitken ... [et al.] ; sponsored by the IEEE Computer Society Test Technology Technical Council (TTTC), the IEEE Computer Society Technical Committee on Fault-Tolerant Computing(TCFTC)
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2005  xii, 602 p. ; 23 cm
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4.

図書

図書
sponsored by IEEE Computer Society Technical Committee on Fault-Tolerant Computing, IFIP WG 10.4 on Dependable Computing and Fault Tolerance, IEICE Technical Group on Dependable Computing ; in cooperation with University of Tokyo, Japan ... [et al.]
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2005  xxviii, 834 p. ; 28 cm.
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5.

図書

図書
[edited by R. Aitken, ... [et al.] ] ; sponsored by IEEE Computer Society Technical Committee on Fault-Tolerant Computing (TCFTC), IEEE Computer Society Test Technology Technical Council (TTTC)
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c2004  xii, 506 p. ; 23 cm
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目次情報: 続きを見る
Message from the Symposium Chairs
Committees
Yield and Defects I / Session 1:
Reliability and Yield: A Joint Defect-Oriented Approach / R. Barsky ; I. Wagner
On the Yield of Compiler-Based eSRAMS / X. Wang ; M. Ottavi ; F. Lombardi
Failure Factor Based Yield Enhancement for SRAM Designs / Y.-T. Hsing ; C.-W. Wang ; C. Tsun ; C.-W. Wu
Yield and Defects II / Session 2:
Defect Characterization for Scaling of QCA Devices / J. Huang ; M. Momenzadeh ; M. Tahoori
A Highly Fault Tolerant PLA Architecture for Failure-Prone Nanometer CMOS and Novel Quantum Device Technologies / A. Schmid ; Y. Leblebici
Probabilistic Balancing of Fault Coverage and Test Cost in Combined Built-In Self-Test/Automated Test Equipment Testing Environment / S. Zhang ; M. Choi ; N. Park
Optoelectronics / Session 3:
Characteristics of Fault-Tolerant Photodiode and Photogate Active Pixel Sensors (APS) / M. La Haye ; g. Chapman ; C. Jung ; D. Cheung ; S. Djaja ; B. Wang ; G. Liaw ; Y. Audet
Defect Avoidance in a 3-D Heterogeneous Sensor / G. Chapman ; V. Jain ; S. Bhansali
Defect and Fault Tolerance / Session 4:
Co-Design and Refinement for Safety Critical Systems / A. Aljer ; P. Devienne
Noise Effects on Performance of Low Power Design Schemes in Deep Submicron Regime / M. Abbas ; M. Ikeda ; K. Asada
On the Defect Tolerance of Nano-Scale Two-Dimensional Crossbars
Memory Test / Session 5:
Monitoring Methodology for TID Damaging of SDRAM Devices Based on Retention Time Analysis / S. Bertazzoni ; D. Di Giovenale ; M. Salmeri ; A. Mencattini ; A. Salsano ; M. Florean ; J. Wyss ; R. Rando ; S. Lora
Testing of Inter-Word Coupling Faults in Word-Oriented SRAMs
Designs for Reducing Test Time of Distributed Small Embedded SRAMs / Y. Wu ; A. Ivanov
Diagnosis / Session 6:
An Efficient Hardware-Based Fault Diagnosis Scheme for AES: Performances and Cost / G. Bertoni ; L. Breveglieri ; I. Koren ; P. Maistri
A Fading Algorithm for Sequential Fault Diagnosis / S.-Y. Huang
Error Correcting Codes / Session 7:
Compression of VLSI Test Data by Arithmetic Coding / H. Hashempour
Data Integrity Evaluations of Reed Solomon Codes for Storage Systems / G. Cardarilli ; S. Pontarelli ; M. Re
An XOR-Based Reed-Solomon Algorithm for Advanced RAID Systems / P.-H. Hsieh ; I.-Y. Chen ; Y.-T. Lin ; S.-Y. Kuo
Interconnect Faults / Session 8:
Modeling and Analysis of Crosstalk Coupling Effect on the Victim Interconnect Using the ABCD Network Model / A. Palit ; V. Meyer ; W. Anheier ; J. Schloeffel
Reducing Fault Latency in Concurrent On-line Testing by Using Checking Functions over Internal Lines / I. Pomeranz ; S. Reddy
"Victim Gate" Crosstalk Fault Model / M. Favalli
RF and High Speed Circuits / Session 9:
Fast and Low-Cost Clock Deskew Buffer / M. Omana ; D. Rossi ; C. Metra
Dynamic Input Match Correction in RF Low Noise Amplifiers / T. Das ; A. Gopalan ; C. Washburn ; P. Mukund
Mixed Loopback BiST for RF Digital Transceivers / J. Dabrowski ; J. Bayon
Analog Testing / Session 10:
Fault Diagnosis in Analog Circuits by Operation-Region Model and X-Y Zoning Method / Y. Miura
Robust Low-Cost Analog Signal Acquisition with Self-Test Capabilities / A. de Souza ; L. Carro
Interactive Session / Session 11:
Coupling Different Methodologies to Validate Obsolete Microprocessors / L. Anghel ; E. Sanchez ; M. Reorda ; G. Squillero ; R. Velazco
A New Approach to Linear Connections Building BIST Structure Based on CSTP Structure / I. Gosciniak
Transient Current Testing for Dynamic CMOS Circuits / N. Aaraj ; A. Nazer ; A. Chehab ; A. Kayssi
IC HTOL Test Stress Condition Optimization / B. Peng ; C. Bolger
Testing and Defect Tolerance: A Rent's Rule Based Analysis and Implications on Nanoelectronics / A. Kumar ; S. Tiwari
Arithmetic Operators Robust to Multiple Simultaneous Upsets / C. Lisboa
Response Compaction for Test Time and Test Pins Reduction Based on Advanced Convolutional Codes / Y. Han ; Y. Hu ; H. Li ; X. Li ; A. Chandra
An Efficient Perfect Algorithm for Memory Repair Problems / H.-Y. Lin ; F.-M. Yeh
First Level Hold: A Novel Low-Overhead Delay Fault / S. Bhunia ; H. Mahmoodi ; A. Raychowdhury ; K. Roy
Error-Resilient Test Data Compression Using Tunstall Codes / L. Schiano
Online Testable Reversible Logic Circuit Design Using NAND Blocks / D. Vasudevan ; P. Lala ; J. Parkerson
Toggle-Masking for Test-per-Scan VLSI Circuits / N. Parimi ; X. Sun
Learning Based on Fault Injection and Weight Restriction for Fault-Tolerant Hopfield Neural Networks / N. Kamiura ; T. Isokawa ; N. Matsui
Nonvolatile Repair Caches Repair Embedded SRAM and New Nonvolatile Memories / J. Fong ; R. Acklin ; J. Roscher ; F. Li ; C. Laird ; C. Pietrzyk
Modeling Yield of Carbon-Nanotube/Silicon-Nanowire FET-Based Nanoarray Architecture with h-hot Addressing Scheme
Error Detection and Correction / Session 12:
Annotated Bit-Flip Fault Model
Accurate Estimation of Soft Error Rate (SER) in VLSI Circuits / A. Maheshwari ; W. Burleson
At-Speed Functional Verification of Programmable Devices / N. Bombieri ; F. Fummi ; G. Pravadelli
Incorporating Signature-Monitoring Technique in VLIW Processors / Y.-Y. Chen ; K.-F. Chen
System-on-Chip Test / Session 13:
Exploiting an I-IP for In-field SOC Test / P. Bernardi ; M. Rebaudengo
Non-Intrusive Test Compression for SOC Using Embedded FPGA Core / G. Zeng ; H. Ito
Circuit and System Reliability and Dependability / Session 14:
On-Line Analysis and Perturbation of CAN Networks / M. Violante
Reliable System Co-design: The FIR Case Study / C. Bolchini ; A. Miele ; F. Salice ; D. Sciuto ; L. Pomante
Reliability Modeling and Assurance of Clockless Wave Pipeline / T. Feng ; Y. Kim ; F. Meyer
System-Level Dependability Analysis with RT-Level Fault Injection Accuracy / R. Leveugle ; D. Cimonnet ; A. Ammari
Novel Test Approaches / Session 15:
A Preliminary Investigation of Observation Diversity for Enhancing Fortuitous Detection of Defects / J. Dworak ; J. Wingfield ; M. Mercer
Concurrent On-line Testing of Identical Circuits through Output Comparison Using Non-Identical Input Vectors
FPGA and Reconfigurable Circuits / Session 16:
An Application-Independent Delay Testing Methodology for Island-Style FPGA / Y.-L. Peng ; J.-J. Liou ; C.-T. Huang
Concurrent Error Detection in Sequential Circuits Implemented Using Embedded Memory of LUT-Based FPGAs / A. Krasniewski
Reconfiguration Algorithm for Degradable Processor Arrays Based on Row and Column Rerouting / M. Fukushi ; S. Horiguchi
Author Index
Message from the Symposium Chairs
Committees
Yield and Defects I / Session 1:
6.

図書

図書
sponsored by the IEEE Computer Society, IEEE Computer Society Technical Committee on Fault-Tolerant Computing
出版情報: Los Alamitos, CA. ; Tokyo : IEEE Computer Society Press, c1997  xi,314 p. ; 23 cm
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7.

図書

図書
sponsored by IEEE Computer Society Technical Committee on Fault-Tolerant Computing, National Taiwan University ... [et al.]
出版情報: Los Alamitos, Calif. : IEEE Computer Society Press, c1997  xii, 243 p. ; 28 cm
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8.

図書

図書
sponsored by the IEEE Computer Society Technical Committee on Fault-Tolerant Computing ; in cooperation with Center for Advanced Computing and Communication at Duke University ... [et al.]
出版情報: Los Alamitos, Calif. : IEEE Computer Society, c1998  xii, 278 p. ; 28 cm
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9.

図書

図書
sponsored by IEEE Computer Society Technical Committees on Distributed Processing, LSE-Operating Systems Lab., EPF Lausanne, Switzerland
出版情報: Los Alamitos, CA ; Tokyo : IEEE Computer Society, c1999  xii, 402 p. ; 28 cm
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目次情報: 続きを見る
Message from the Symposium Chair
Message from the Program Co-Chairs
Conference Committee
Referees
Reliability of Future Telephone Networks / R. Cooper
Mobile Computing / Session 1:
Information Dissemination in Partitionable Mobile Ad Hoc Networks / G. Karumanchi ; S. Muralidharan ; R. Prakash
Group Multicast in Distributed Mobile Systems with Unreliable Wireless Network / G. Anastasi ; A. Bartoli ; F. Spadoni
Improving Level of Service for Mobile Users using Context-Awareness / P. Couderc ; A. Kermarrec
Distributed Algorithms / Session 2:
An Algorithm for Fault-Tolerant Clock State and Rate Synchronization / K. Schossmaier ; B. Weiss
Real-Time Fault-Tolerant Atomic Broadcast / C. Delporte-Gallet ; H. Fauconnier
A General Framework to Solve Agreement Problems / M. Hurfin ; R. Macedo ; M. Raynal ; F. Tronel
Formal Methods / Session 3:
Formal Hazard Analysis of Hybrid Systems in cTLA / P. Herrmann ; H. Krumm
Safecharts for Specifying and Designing Safety Critical Systems / H. Dammag ; N. Nissanke
Replication Techniques / Session 4:
Implementing a Semi-Active Replication Strategy in CHORUS/ClassiX, A Distributed Real-Time Executive / A. Deplanche ; P. Theaudiere ; Y. Trinquet
View Divergence Control of Replicated Data using Update Delay Estimation / T. Yamashita ; S. Ono
Highly Available Process Support Systems: Implementing Backup Mechanisms / C. Hagen ; G. Alonso
Scalability / Session 5:
Scalable Stability Detection using Logical Hypercube / R. Friedman ; S. Manor ; K. Guo
On Diffusing Updates in a Byzantine Environment / D. Malkhi ; Y. Mansour ; M. Reiter
Fault-Tolerant Replication Management in Large-Scale Distributed Storage Systems / R. Golding ; E. Borowsky
Failure Analysis / Session 6:
A Component-based Approach to Reliability Analysis of Distributed Systems / S. Yacoub ; B. Cukic ; H. Ammar
Fault Injection based on a Partial View of the Global State of a Distributed System / M. Cukier ; R. Chandra ; D. Henke ; J. Pistole ; W. Sanders
Failure Data Analysis of a LAN of Windows NT based Computers / M. Kalyanakrishnam ; Z. Kalbarczyk ; R. Iyer
System Support / Session 7:
HAMFS File System / Y. Shinkai ; Y. Tsuchiya ; T. Murakami ; J. Williams
Logging and Recovery in Adaptive Software Distributed Shared Memory Systems / A. Kongmunvattana ; N. Tzeng
Tolerating Transient Faults in Statically Scheduled Safety-Critical Embedded Systems / N. Kandasamy ; J. Hayes ; B. Murray
Logging and Checkpointing / Session 8:
Issues in the Design of a Reflective Library for Checkpointing C++ Objects / M. Kasbekar ; C. Das ; S. Yajnik ; R. Klemm ; Y. Huang
Optimistic Recovery in Multi-threaded Distributed Systems / O. Damani ; A. Tarafdar ; V. Garg
An Adaptive Checkpointing Protocol to Bound Recovery Time with Message Logging / K. Ssu ; B. Yao ; K. Fuchs
Corba / Session 9:
CosNamingFT--A Fault-Tolerant CORBA Naming Service / L. Lung ; J. da Silva Fraga ; J. Farines ; M. Ogg ; A. Ricciardi
Enforcing Determinism for the Consistent Replication of Multithreaded CORBA Applications / P. Narasimhan ; L. Moser ; P. Melliar-Smith
The 'QoS Query Service' for Improved Quality-of-Service Decision Making in CORBA / A. van Moorsel
Work in Progress (Fast Abstracts)
Resolving Distributed Deadlocks in the OR Request Model / J. Villadangos ; F. Farina ; J. Gonzalez de Mendivil ; J. Garitagoitia ; J. Bernabeu-Auban ; G. Vossen
An Efficient Checkpointing Algorithm for Distributed Systems Implementing Reliable Communication Channels / E. Gendelman ; L. Bic ; M. Dillencourt
An Approach for Fault-Tolerance in Hard Real-Time Distributed Systems / P. Chevochot ; I. Puaut
An Agent Platform for Reliable Asynchronous Distributed Programming / L. Bellissard ; N. De Palma ; A. Freyssinet ; M. Herrmann ; S. Lacourte
Exactly-Once End-to-End Semantics in CORBA Invocations across Heterogenous Fault-Tolerant ORBs / A. Vaysburd
A Distributed Algorithm for Deadlock Detection under OR-request Model / S. Lee ; Y. Lee
Design and Validation of a Distributed Industrial Control System's Nodes / J. Campelo ; F. Rodriguez ; P. Gil ; J. Serrano
Performance Evaluation of the Circulating Multisequencer and the Consensus Algorithms in a Real-Time Distributed Transactional System / L. Saidane ; F. Kamoun
Database Replication: If You Must be Lazy, be Consistent / J. Holliday ; D. Agrawal ; A. El Abbadi
A Software Multilevel Fault Injection Mechanism: Case Study Evaluating the Virtual Interface Architecture / T. Liu
Workshop on Reliable Middleware (Wremi)
Foreword
The Mainframe as a High-Available, Highly Scalable CORBA Platform / W. Froidevaux ; S. Murer ; M. Prater
A Method for Combining Replication with Caching / M. Little ; S. Shrivastava
Fault Tolerance in Three-Tier Applications: Focusing on the Database Tier
Workshop on Electronic Commerce (Welcom)
XML Documents Production for an Electronic Platform of Requests for Proposals / F. Bapst ; C. Vanoirbeek
Service Provision and Composition in Virtual Business Communities / A. Marton ; G. Piccinelli ; C. Turfin
Quality of Service in Business-to-Business E-Commerce Applications / U. Fiedler ; B. Plattner
A Practical Guideline to the Implementation of Online Shops / A. Bartelt ; J. Meyer
Approaching a Formal Definition of Fairness in Electronic Commerce / F. Gartner ; H. Pagnia ; H. Vogt
Trust and Electronic Commerce--More than a Technical Problem / K. Konrad ; J. Barthel ; G. Fuchs
Authorization Methods for E-Commerce Applications / R. Oppliger
Gateways to Overcome Incompatibilities of Security Mechanisms / J. Zollner
Security Mechanisms for using Mobile Agents in Electronic Commerce / P. Marques ; L. Silva ; J. Silva
Accountable Anonymous Access to Services in Mobile Communication Systems / L. Buttyan ; J.-P. Hubaux
On the Provision of Replicated Internet Auction Services / F. Panzieri
The Usability Risk / A. Platt
Index of Authors
Message from the Symposium Chair
Message from the Program Co-Chairs
Conference Committee
10.

図書

図書
sponsored by IEEE Computer Society, IEEE Computer Society Technical Committee on Fault-Tolerant Computing, IEEE Computer Society Test Technology Technical Council
出版情報: Los Alamitos, CA. ; Tokyo : IEEE Computer Society, c1998  xiii, 405 p. ; 23 cm
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