close
1.

図書

図書
福田務, 田中洋一郎著
出版情報: 東京 : ナツメ社, 2002.10  227p ; 19cm
シリーズ名: 図解雑学 : 絵と文章でわかりやすい!
所蔵情報: loading…
2.

図書

図書
電波新聞社編
出版情報: 東京 : 電波新聞社, 2002.4-  冊 ; 26cm
シリーズ名: 電子工業年鑑 / 電波新聞社編 ; 別冊
所蔵情報: loading…
3.

図書

図書
橋本尚, 橋本岳著
出版情報: 東京 : 講談社, 2001.12  vi, 232p ; 21cm
所蔵情報: loading…
4.

図書

図書
市川昌和編著
出版情報: 東京 : 日経BP社, 2001.11  285p ; 26cm
シリーズ名: アトムテクノロジーへの挑戦 : ナノテクノロジーの最前線 / 田中一宜監修 ; 1
所蔵情報: loading…
5.

図書

図書
論文飜譯委員会 [編]
出版情報: 東京 : 電信電話學會, 1930.11  1冊 ; 23cm
所蔵情報: loading…
6.

図書

図書
毛塚博史編著 ; 中野善明, 光井俊治 [執筆]
出版情報: 東京 : 実教出版, 2006.4  172p ; 21cm
シリーズ名: 専門基礎ライブラリー
所蔵情報: loading…
7.

図書

図書
井上誠一著
出版情報: 東京 : ナツメ社, 2003.2  235p ; 19cm
シリーズ名: 図解雑学 : 絵と文章でわかりやすい!
所蔵情報: loading…
8.

図書

図書
藤井信生監修
出版情報: 東京 : オーム社, 2006.1  xiv, 539p ; 21cm
所蔵情報: loading…
9.

図書

図書
editors, J. Morais ... [et al.]
出版情報: Warrendale, Pa. : Materials Research Society, c2004  xv, 471 p. ; 24 cm
シリーズ名: Materials Research Society symposium proceedings ; v. 811
所蔵情報: loading…
10.

図書

図書
Nobuyasu Kanekawa ... [et al.]
出版情報: New York : Springer, c2011  xxv, 204 p. ; 25 cm
所蔵情報: loading…
目次情報: 続きを見る
Introduction / 1:
Trends in Failure Cause and Countermeasure / 1.1:
Contents and Organization of This Book / 1.2:
For the Best Result / 1.3:
References
Terrestrial Neutron-Induced Failures in Semiconductor Devices and Relevant Systems and Their Mitigation Techniques / 2:
SER in Memory Devices / 2.1:
MCU in Memory Devices / 2.1.2:
SET and MNU in Logic Devices / 2.1.3:
Chip/System-Level SER Problem: SER Estimation and Mitigation / 2.1.4:
Scope of This Chapter / 2.1.5:
Basic Knowledge on Terrestrial Neutron-Induced Soft-Error in MOSFET Devices / 2.2:
Cosmic Rays from the Outer Space / 2.2.1:
Nuclear Spallation Reaction and Charge Collection in CMOSFET Device / 2.2.2:
Experimental Techniques to Quantify Soft-Error Rate (SER) and Their Standardization / 2.3:
The System to Quantify SER - SECIS / 2.3.1:
Basic Method in JESD89A / 2.3.2:
SEE Classification Techniques in Time Domain / 2.3.3:
MCU Classification Techniques in Topological Space Domain / 2.3.4:
Evolution of Multi-node Upset Problem / 2.4:
MCU Characterization by Accelerator-Based Experiments / 2.4.1:
Multi-coupled Bipolar Interaction (MCBI) / 2.4.2:
Simulation Techniques for Neutron-Induced Soft Error / 2.5:
Overall Microscopic Soft-Error Model / 2.5.1:
Nuclear Spallation Reaction Models / 2.5.2:
Charge Deposition Model / 2.5.3:
SRAM Device Model / 2.5.4:
Cell Matrix Model / 2.5.5:
Recycle Simulation Method / 2.5.6:
Validation of SRAM Model / 2.5.7:
Prediction for Scaling Effects Down to 22 nm Design Rule in SRAMs / 2.6:
Roadmap Assumption / 2.6.1:
Results and Discussions / 2.6.2:
Validity of Simulated Results / 2.6.3:
SER Estimation in Devices/Components/System / 2.7:
Standards for SER Measurement for Memories / 2.7.1:
Revisions Needed for the Standards / 2.7.2:
Quantification of SER in Logic Devices and Related Issues / 2.7.3:
An Example of Chip/Board-Level SER Measurement and Architectural Mitigation Techniques / 2.8:
SER Test Procedures for Network Components / 2.8.1:
Hierarchical Mitigation Strategies / 2.8.2:
Basic Three Approaches / 2.9.1:
Design on the Upper Bound (DOUB) / 2.9.2:
Inter Layer Built-in Reliability (LABIR) / 2.10:
Summary / 2.11:
Electromagnetic Compatibility / 3:
Quantitative Estimation of the EMI Radiation Based on the Measured Near-Field Magnetic Distribution / 3.1:
Measurement of the Magnetic Field Distribution Near the Circuit Board / 3.2.1:
Calculation of the Electric Current Distribution on the Circuit Board / 3.2.2:
Calculation of the Far-Field Radiated EMI / 3.2.3:
Development of a Non-contact Current Distribution Measurement Technique for LSI Packaging on PCBs / 3.3:
Electric Current Distribution Detection / 3.3.1:
The Current Detection Result and Its Verification / 3.3.2:
Reduction Technique of Radiated Emission from Chassis with PCB / 3.4:
Far-Field Measurement of Chassis with PCB / 3.4.1:
Measurements of Junction Current / 3.4.2:
PSPICE Modeling / 3.4.3:
Experimental Validation / 3.4.4:
Chapter Summary / 3.5:
Power Integrity / 4:
Detrimental Effect and Technical Trends of Power Integrity Design of Electronic Systems and Devices / 4.1:
Detrimental Effect by Power Supply Noise on Semiconducting Devices / 4.2.1:
Trends of Power Supply Voltage and Power Supply Current for CMOS Semiconducting Devices / 4.2.2:
Trend of Power Distribution Network Design for Electronic Systems / 4.2.3:
Design Methodology of Power Integrity / 4.3:
Definition of Power Supply Noise in Electric System / 4.3.1:
Time-Domain and Frequency-Domain Design Methodology / 4.3.2:
Modeling and Design Methodologies of PDS / 4.4:
Modeling of Electrical Circuit Parameters / 4.4.1:
Design Strategies of PDS / 4.4.2:
Simultaneous Switching Noise (SSN) / 4.5:
Principle of SSN / 4.5.1:
S-G loop SSN / 4.5.2:
P-G loop SSN / 4.5.3:
Measurement of Power Distribution System Performance / 4.6:
On-Chip Voltage Waveform Measurement / 4.6.1:
On-Chip Power Supply Impedance Measurement / 4.6.2:
Fault-Tolerant System Technology / 4.7:
Metrics for Dependability / 5.1:
Reliability / 5.2.1:
Availability / 5.2.2:
Safety / 5.2.3:
Reliability Paradox / 5.3:
Survey on Fault-Tolerant Systems / 5.4:
Technical Issues / 5.5:
High Performance / 5.5.1:
Transparency / 5.5.2:
Physical Transparency / 5.5.3:
Fault Tolerance of Fault Tolerance for Ultimate Safety / 5.5.4:
Reliability of Software / 5.5.5:
Industrial Approach / 5.6:
Autonomous Decentralized Systems / 5.6.1:
Space Application / 5.6.2:
Commercial Fault-Tolerant Systems / 5.6.3:
Ultra-Safe System / 5.6.4:
Availability Improvement vs. Coverage Improvement / 5.7:
Trade-Off Between Availability and Coverage - Stepwise Negotiating Voting / 5.8:
Basic Concept / 5.8.1:
Hiten Onboard Computer / 5.8.2:
Fault-Tolerance Experiments / 5.8.3:
Extension of SNV - Redundancy Management / 5.8.4:
Coverage Improvement / 5.9:
Self-Checking Comparator / 5.9.1:
Optimal Time Diversity / 5.9.2:
On-Chip Redundancy / 5.10:
High Performance (Commercial Fault-Tolerant Computer) / 5.11:
Basic Concepts of TPR Architecture / 5.11.1:
System Configuration / 5.11.2:
System Reconfiguration on Fault Occurrence / 5.11.3:
Processing Take-Over on Fault Occurrence / 5.11.4:
Fault Tolerance of Fault Tolerance / 5.11.5:
Commercial Product Model / 5.11.6:
Current Application Field: X-by-Wire / 5.12:
Challenges in the Future / 6:
Index
Introduction / 1:
Trends in Failure Cause and Countermeasure / 1.1:
Contents and Organization of This Book / 1.2:
文献の複写および貸借の依頼を行う
 文献複写・貸借依頼