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1.

図書

図書
Andrew S. Tanenbaum ; with contributions from James R. Goodman
出版情報: London : Prentice Hall International , Upper Saddle River, N.J. : Prentice Hall, c1999  xviii, 669 p. ; 24 cm
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Introduction / 1:
Computer Systems Organization / 2:
The Digital Logic Level / 3:
The Microarchitecture Level / 4:
The Instruction Set Architecture Level / 5:
The Operating System Machine Level / 6:
The Assembly Language Level / 7:
Parallel Computer Architectures / 8:
Reading List and Bibliography / 9:
Binary Numbers / Appendix A:
Floating-Point Numbers / Appendix B:
Preface
Structured Computer Organization / 1.1:
Languages, Levels, and Virtual Machines / 1.1.1:
Contemporary Multilevel Machines / 1.1.2:
Evolution of Multilevel Machines / 1.1.3:
Milestones in Computer Architecture / 1.2:
The Zeroth Generation-Mechanical Computers (1642-1945) / 1.2.1:
The First Generation-Vacuum Tubes (1945-1955) / 1.2.2:
The Second Generation-Transistors (1955-1965) / 1.2.3:
The Third Generation-Integrated Circuits (1965-1980) / 1.2.4:
The Fourth Generation-Very Large Scale Integration (1980-?) / 1.2.5:
The Fifth Generation-Invisible Computers / 1.2.6:
The Computer Zoo / 1.3:
Technological and Economic Forces / 1.3.1:
The Computer Spectrum / 1.3.2:
Disposable Computers / 1.3.3:
Microcontrollers / 1.3.4:
Game Computers / 1.3.5:
Personal Computers / 1.3.6:
Servers / 1.3.7:
Collections of Workstations / 1.3.8:
Mainframes / 1.3.9:
Example Computer Families / 1.4:
Introduction to the Pentium 4 / 1.4.1:
Introduction to the UltraSPARC III / 1.4.2:
Introduction to the 8051 / 1.4.3:
Metric Units / 1.5:
Outline of This Book / 1.6:
Processors / 2.1:
CPU Organization / 2.1.1:
Instruction Execution / 2.1.2:
RISC versus CISC / 2.1.3:
Design Principles for Modern Computers / 2.1.4:
Instruction-Level Parallelism / 2.1.5:
Processor-Level Parallelism / 2.1.6:
Primary Memory / 2.2:
Bits / 2.2.1:
Memory Addresses / 2.2.2:
Byte Ordering / 2.2.3:
Error-Correcting Codes / 2.2.4:
Cache Memory / 2.2.5:
Memory Packaging and Types / 2.2.6:
Secondary Memory / 2.3:
Memory Hierarchies / 2.3.1:
Magnetic Disks / 2.3.2:
Floppy Disks / 2.3.3:
IDE Disks / 2.3.4:
SCSI Disks / 2.3.5:
RAID / 2.3.6:
CD-ROMs / 2.3.7:
CD-Recordables / 2.3.8:
CD-Rewritables / 2.3.9:
DVD / 2.3.10:
Blu-Ray / 2.3.11:
Input/Output / 2.4:
Buses / 2.4.1:
Terminals / 2.4.2:
Mice / 2.4.3:
Printers / 2.4.4:
Telecommunications Equipment / 2.4.5:
Digital Cameras / 2.4.6:
Character Codes / 2.4.7:
Summary / 2.5:
Gates and Boolean Algebra / 3.1:
Gates / 3.1.1:
Boolean Algebra / 3.1.2:
Implementation of Boolean Functions / 3.1.3:
Circuit Equivalence / 3.1.4:
Basic Digital Logic Circuits / 3.2:
Integrated Circuits / 3.2.1:
Combinational Circuits / 3.2.2:
Arithmetic Circuits / 3.2.3:
Clocks / 3.2.4:
Memory / 3.3:
Latches / 3.3.1:
Flip-Flops / 3.3.2:
Registers / 3.3.3:
Memory Organization / 3.3.4:
Memory Chips / 3.3.5:
RAMs and ROMs / 3.3.6:
CPU Chips and Buses / 3.4:
CPU Chips / 3.4.1:
Computer Buses / 3.4.2:
Bus Width / 3.4.3:
Bus Clocking / 3.4.4:
Bus Arbitration / 3.4.5:
Bus Operations / 3.4.6:
Example CPU Chips / 3.5:
The Pentium 4 / 3.5.1:
The UltraSPARC III / 3.5.2:
The 8051 / 3.5.3:
Example Buses / 3.6:
The ISA Bus / 3.6.1:
The PCI Bus / 3.6.2:
PCI Express / 3.6.3:
The Universal Serial Bus / 3.6.4:
Interfacing / 3.7:
I/O Chips / 3.7.1:
Address Decoding / 3.7.2:
An Example Microarchitecture / 3.8:
The Data Path / 4.1.1:
Microinstructions / 4.1.2:
Microinstruction Control: The Mic-1 / 4.1.3:
An Example Isa: IJVM / 4.2:
Stacks / 4.2.1:
The IJVM Memory Model / 4.2.2:
The IJVM Instruction Set / 4.2.3:
Compiling Java to IJVM / 4.2.4:
An Example Implementation / 4.3:
Microinstructions and Notation / 4.3.1:
Implementation of IJVM Using the Mic-1 / 4.3.2:
Design of the Microarchitecture Level / 4.4:
Speed versus Cost / 4.4.1:
Reducing the Execution Path Length / 4.4.2:
A Design with Prefetching: The Mic-2 / 4.4.3:
A Pipelined Design: The Mic-3 / 4.4.4:
A Seven-Stage Pipeline: The Mic-4 / 4.4.5:
Improving Performance / 4.5:
Branch Prediction / 4.5.1:
Out-of-Order Execution and Register Renaming / 4.5.3:
Speculative Execution / 4.5.4:
Examples of the Microarchitecture Level / 4.6:
The Microarchitecture of the Pentium 4 CPU / 4.6.1:
The Microarchitecture of the UltraSPARC-III Cu CPU / 4.6.2:
The Microarchitecture of the 8051 CPU / 4.6.3:
Comparison of the Pentium, Ultrasparc, and 8051 / 4.7:
Overview of the ISA Level / 4.8:
Properties of the ISA Level / 5.1.1:
Memory Models / 5.1.2:
Instructions / 5.1.3:
Overview of the Pentium 4 ISA Level / 5.1.5:
Overview of the UltraSPARC III ISA Level / 5.1.6:
Overview of the 8051 ISA Level / 5.1.7:
Data Types / 5.2:
Numeric Data Types / 5.2.1:
Nonnumeric Data Types / 5.2.2:
Data Types on the Pentium 4 / 5.2.3:
Data Types on the UltraSPARC III / 5.2.4:
Data Types on the 8051 / 5.2.5:
Instruction Formats / 5.3:
Design Criteria for Instruction Formats / 5.3.1:
Expanding Opcodes / 5.3.2:
The Pentium 4 Instruction Formats / 5.3.3:
The UltraSPARC III Instruction Formats / 5.3.4:
The 8051 Instruction Formats / 5.3.5:
Addressing / 5.4:
Addressing Modes / 5.4.1:
Immediate Addressing / 5.4.2:
Direct Addressing / 5.4.3:
Register Addressing / 5.4.4:
Register Indirect Addressing / 5.4.5:
Indexed Addressing / 5.4.6:
Based-Indexed Addressing / 5.4.7:
Stack Addressing / 5.4.8:
Addressing Modes for Branch Instructions / 5.4.9:
Orthogonality of Opcodes and Addressing Modes / 5.4.10:
The Pentium 4 Addressing Modes / 5.4.11:
The UltraSPARC III Addressing Modes / 5.4.12:
The 8051 Addressing Modes / 5.4.13:
Discussion of Addressing Modes / 5.4.14:
Instruction Types / 5.5:
Data Movement Instructions / 5.5.1:
Dyadic Operations / 5.5.2:
Monadic Operations / 5.5.3:
Comparisons and Conditional Branches / 5.5.4:
Procedure Call Instructions / 5.5.5:
Loop Control / 5.5.6:
The Pentium 4 Instructions / 5.5.7:
The UltraSPARC III Instructions / 5.5.9:
The 8051 Instructions / 5.5.10:
Comparison of Instruction Sets / 5.5.11:
Flow of Control / 5.6:
Sequential Flow of Control and Branches / 5.6.1:
Procedures / 5.6.2:
Coroutines / 5.6.3:
Traps / 5.6.5:
Interrupts
A Detailed Example: The Towers of Hanoi / 5.7:
The Towers of Hanoi in Pentium 4 Assembly Language / 5.7.1:
The Towers of Hanoi in UltraSPARC III Assembly Language / 5.7.2:
The IA-64 Architecture and the Itanium 2 / 5.8:
The Problem with the Pentium 4 / 5.8.1:
The IA-64 Model: Explicitly Parallel Instruction Computing / 5.8.2:
Reducing Memory References / 5.8.3:
Instruction Scheduling / 5.8.4:
Reducing Conditional Branches: Predication / 5.8.5:
Speculative Loads / 5.8.6:
Virtual Memory / 5.9:
Paging / 6.1.1:
Implementation of Paging / 6.1.2:
Demand Paging and the Working Set Model / 6.1.3:
Page Replacement Policy / 6.1.4:
Page Size and Fragmentation / 6.1.5:
Segmentation / 6.1.6:
Implementation of Segmentation / 6.1.7:
Virtual Memory on the Pentium 4 / 6.1.8:
Virtual Memory on the UltraSPARC III / 6.1.9:
Virtual Memory and Caching / 6.1.10:
Virtual I/O Instructions / 6.2:
Files / 6.2.1:
Implementation of Virtual I/O Instructions / 6.2.2:
Directory Management Instructions / 6.2.3:
Virtual Instructions for Parallel Processing / 6.3:
Process Creation / 6.3.1:
Race Conditions / 6.3.2:
Process Synchronization Using Semaphores / 6.3.3:
Example Operating Systems / 6.4:
Examples of Virtual Memory / 6.4.1:
Examples of Virtual I/O / 6.4.3:
Examples of Process Management / 6.4.4:
Introduction to Assembly Language / 6.5:
What Is an Assembly Language? / 7.1.1:
Why Use Assembly Language? / 7.1.2:
Format of an Assembly Language Statement / 7.1.3:
Pseudoinstructions / 7.1.4:
Macros / 7.2:
Macro Definition, Call, and Expansion / 7.2.1:
Macros with Parameters / 7.2.2:
Advanced Features / 7.2.3:
Implementation of a Macro Facility in an Assembler / 7.2.4:
The Assembly Process / 7.3:
Two-Pass Assemblers / 7.3.1:
Pass One / 7.3.2:
Pass Two / 7.3.3:
The Symbol Table / 7.3.4:
Linking and Loading / 7.4:
Tasks Performed by the Linker / 7.4.1:
Structure of an Object Module / 7.4.2:
Binding Time and Dynamic Relocation / 7.4.3:
Dynamic Linking / 7.4.4:
On-Chip Paralellism / 7.5:
On-Chip Multithreading / 8.1.1:
Single-Chip Multiprocessors / 8.1.3:
Coprocessors / 8.2:
Network Processors / 8.2.1:
Media Processors / 8.2.2:
Cryptoprocessors / 8.2.3:
Shared-Memory Multiprocessors / 8.3:
Multiprocessors vs. Multicomputers / 8.3.1:
Memory Semantics / 8.3.2:
UMA Symmetric Multiprocessor Architectures / 8.3.3:
NUMA Multiprocessors / 8.3.4:
COMA Multiprocessors / 8.3.5:
Message-Passing Multicomputers / 8.4:
Interconnection Networks / 8.4.1:
MPPs-Massively Parallel Processors / 8.4.2:
Cluster Computing / 8.4.3:
Communication Software for Multicomputers / 8.4.4:
Scheduling / 8.4.5:
Application-Level Shared Memory / 8.4.6:
Performance / 8.4.7:
Grid Computing / 8.5:
Suggestions for Further Reading / 8.6:
Introduction and General Works / 9.1.1:
Binary and Floating-Point Numbers / 9.1.2:
Assembly Language Programming / 9.1.10:
Alphabetical Bibliography / 9.2:
Finte-Precision Numbers / A:
Radix Number Systems / A.2:
Conversion From One Radix to Another / A.3:
Negative Binary Numbers / A.4:
Binary Arithmetic / A.5:
Principles of Floating Point / B:
IEEE Floating-Point Standard 754 / B.2:
Overview / C:
Assembly Language / C.1.1:
A Small Assembly Language Program / C.1.2:
The 8088 Processor / C.2:
The Processor Cycle / C.2.1:
The General Registers / C.2.2:
Pointer Registers / C.2.3:
Memory and Addressing / C.3:
Memory Organization and Segments / C.3.1:
The 8088 Instruction Set / C.3.2:
Move, Copy and Arithmetic / C.4.1:
Logical, Bit and Shift Operations / C.4.2:
Loop and Repetitive String Operations / C.4.3:
Jump and Call Instructions / C.4.4:
Subroutine Calls / C.4.5:
System Calls and System Subroutines / C.4.6:
Final Remarks on the Instruction Set / C.4.7:
The Assembler / C.5:
The ACK-Based Tutorial Assembler as88 / C.5.1:
Some Differences with Other 8088 Assemblers / C.5.3:
The Tracer / C.6:
Tracer Commands / C.6.1:
Getting Started / C.7:
Examples / C.8:
Hello World Example / C.8.1:
General Registers Example / C.8.2:
Call Command and Pointer Registers / C.8.3:
Debugging an Array Print Program / C.8.4:
Introduction / 1:
Computer Systems Organization / 2:
The Digital Logic Level / 3:
2.

図書

図書
[by] Donald I. Cutler
出版情報: Englewood Cliffs, N.J. : Prentice-Hall, [1972]  x, 303 p. ; 24 cm
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3.

図書

図書
Oliver Rüthing
出版情報: Berlin ; New York : Springer, c1998  xii, 225 p. ; 24 cm
シリーズ名: Lecture notes in computer science ; 1539
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Introduction
Basic Formalisms and Definitions
Expresson Motion: Optimal Expression Motion: The Single-Expression View / Part 1:
Optimal Expression Motion: The Multiple-Expression View
Expression Motion in the Presence of Critical Edges
Assignment Motion: Program Transformations Based on Assignment Motion / Part 2:
A Framework for Assignment Motion Based Program Transformations
Assignment Motion in the Presence of Critical Edges
Conclusions and Perspectives
References
Index
Introduction
Basic Formalisms and Definitions
Expresson Motion: Optimal Expression Motion: The Single-Expression View / Part 1:
4.

図書

図書
L. Dale Harris
出版情報: Columbus, Ohio : C.E. Merrill Books, c1964  xi, 244 p ; 23 cm
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5.

図書

図書
John Essick
出版情報: New York : Oxford University Press, c2016  xviii, 668 p. ; 24 cm
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6.

図書

図書
Al Sweigart
出版情報: San Francisco : No Starch Press, c2015  xxi, 479 p. ; 24 cm
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7.

図書

図書
Henry S. Warren, Jr
出版情報: Upper Saddle River, N.J. : Addison-Wesley, c2013  xvi, 494 p. ; 24 cm
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Foreword
Preface
Introduction / Chapter 1:
Notation / 1-1:
Instruction Set and Execution Time Model / 1-2:
Basics / Chapter 2:
Manipulating Rightmost Bits / 2-1:
Addition Combined with Logical Operations / 2-2:
Inequalities among Logical and Arithmetic Expressions / 2-3:
Absolute Value Function / 2-4:
Average of Two Integers / 2-5:
Sign Extension / 2-6:
Shift Right Signed from Unsigned / 2-7:
Sign Function / 2-8:
Three-Valued Compare Function / 2-9:
Transfer of Sign Function / 2-10:
Decoding a "Zero Means 2**n" Field / 2-11:
Comparison Predicates / 2-12:
Overflow Detection / 2-13:
Condition Code Result of Add, Subtract, and Multiply / 2-14:
Rotate Shifts / 2-15:
Double-Length Add/Subtract / 2-16:
Double-Length Shifts / 2-17:
Multibyte Add, Subtract, Absolute Value / 2-18:
Doz, Max, Min / 2-19:
Exchanging Registers / 2-20:
Alternating among Two or More Values / 2-21:
A Boolean Decomposition Formula / 2-22:
Implementing Instructions for all 16 Binary Boolean Operations / 2-23:
Power-of-2 Boundaries / Chapter 3:
Rounding Up/Down to a Multiple of a Known Power of 2 / 3-1:
Rounding Up/Down to the Next Power of 2 / 3-2:
Detecting a Power-of-2 Boundary Crossing / 3-3:
Arithmetic Bounds / Chapter 4:
Checking Bounds of Integers / 4-1:
Propagating Bounds through Add's and SubtractÆs / 4-2:
Propagating Bounds through Logical Operations / 4-3:
Counting Bits / Chapter 5:
Counting 1-Bits / 5-1:
Parity / 5-2:
Counting Leading 0's / 5-3:
Counting Trailing 0's / 5-4:
Searching Words / Chapter 6:
Find First 0-Byte / 6-1:
Find First String of 1-Bits of a Given Length / 6-2:
Find Longest String of 1-Bits / 6-3:
Find Shortest String of 1-Bits / 6-4:
Rearranging Bits and Bytes / Chapter 7:
Reversing Bits and Bytes / 7-1:
Shuffling Bits / 7-2:
Transposing a Bit Matrix / 7-3:
Compress, or Generalized Extract / 7-4:
Expand, or Generalized Insert / 7-5:
Hardware Algorithms for Compress and Expand / 7-6:
General Permutations, Sheep and Goats Operation / 7-7:
Rearrangements and Index Transformations / 7-8:
An LRU Algorithm / 7-9:
Multiplication / Chapter 8:
Multiword Multiplication / 8-1:
High-Order Half of 64-Bit Product / 8-2:
High-Order Product Signed from/to Unsigned / 8-3:
Multiplication by Constants / 8-4:
Integer Division / Chapter 9:
Preliminaries / 9-1:
Multiword Division / 9-2:
Unsigned Short Division from Signed Division / 9-3:
Unsigned Long Division / 9-4:
Doubleword Division from Long Division / 9-5:
Integer Division by Constants / Chapter 10:
Signed Division by a Known Power of 2 / 10-1:
Signed Remainder from Division by a Known Power of 2 / 10-2:
Signed Division and Remainder by Non-Powers of 2 / 10-3:
Signed Division by Divisors > 2 / 10-4:
Signed Division by Divisors ≤-2 / 10-5:
Incorporation into a Compiler / 10-6:
Miscellaneous Topics / 10-7:
Unsigned Division / 10-8:
Unsigned Division by Divisors ≥ 1 / 10-9:
Incorporation into a Compiler (Unsigned) / 10-10:
Miscellaneous Topics (Unsigned) / 10-11:
Applicability to Modulus and Floor Division / 10-12:
Similar Methods / 10-13:
Sample Magic Numbers / 10-14:
Simple Code in Python / 10-15:
Exact Division by Constants / 10-16:
Test for Zero Remainder after Division by a Constant / 10-17:
Methods Not Using Multiply High / 10-18:
Remainder by Summing Digits / 10-19:
Remainder by Multiplication and Shifting Right / 10-20:
Converting to Exact Division / 10-21:
A Timing Test / 10-22:
A Circuit for Dividing by 3 / 10-23:
Some Elementary Functions / Chapter 11:
Integer Square Root / 11-1:
Integer Cube Root / 11-2:
Integer Exponentiation / 11-3:
Integer Logarithm / 11-4:
Unusual Bases for Number Systems / Chapter 12:
Base-2 / 12-1:
Base-l + i / 12-2:
Other Bases / 12-3:
What Is the Most Efficient Base? / 12-4:
Gray Code / Chapter 13:
Incrementing a Gray-Coded Integer / 13-1:
Negabinary Gray Code / 13-3:
Brief History and Applications / 13-4:
Cyclic Redundancy Check / Chapter 14:
Theory / 14-1:
Practice / 14-3:
Error-correcting codes / Chapter 15:
The Hamming Code / 15-1:
Software for SEC-DED on 32 Information Bits / 15-3:
Error Correction Considered More Generally / 15-4:
Hilbert's Curve / Chapter 16:
A Recursive Algorithm for Generating the Hilbert Curve / 16-1:
Coordinates from Distance along the Hilbert Curve / 16-2:
Distance from Coordinates on the Hilbert Curve / 16-3:
Incrementing the Coordinates on the Hilbert Curve / 16-4:
Non-Recursive Generating Algorithms / 16-5:
Other Space-Filling Curves / 16-6:
Applications / 16-7:
Floating-Point / Chapter 17:
IEEE Format / 17-1:
Floating-Point To/From Integer Conversions / 17-2:
Comparing Floating-Point Numbers Using Integer Operations / 17-3:
An Approximate Reciprocal Square Root Routine / 17-4:
The Distribution of Leading Digits / 17-5:
Table of Miscellaneous Values / 17-6:
Formulas for Primes / Chapter 18:
Willans's Formulas / 18-1:
Wormell's Formula / 18-3:
Formulas for Other Difficult Functions / 18-4:
Answers to Exercises
Arithmetic Tables for a 4-Bit Machine / Appendix A:
Newton's Method / Appendix B:
A Gallery of Graphs of Discrete Functions / Appendix C:
Plots of Logical Operations on Integers / C-1:
Plots of Addition, Subtraction, and Multiplication / C-2:
Plots of Functions Involving Division / C-3:
Plots of the Compress, SAG, and Rotate Left Functions / C-4:
2D Plots of Some Unary Functions / C-5:
Bibliography
Index
Foreword
Preface
Introduction / Chapter 1:
8.

図書

図書
Robert Nieuwenhuis (ed.)
出版情報: Berlin ; Tokyo : Springer, c2003  xi, 514 p. ; 24 cm
シリーズ名: Lecture notes in computer science ; 2706
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9.

図書

図書
Torben Æ. Mogensen, David A. Schmidt, I. Hal Sudborough (eds.)
出版情報: Berlin ; Tokyo : Springer, c2002  xiv, 471 p. ; 24 cm
シリーズ名: Lecture notes in computer science ; 2566
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10.

図書

図書
Gernot Beer
出版情報: Chichester ; New York : John Wiley & Sons, c2001  xiv, 457 p. ; 25 cm
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11.

図書

図書
[by] R. M. Burstall, J. S. Collins [and] R. J. Popplestone
出版情報: Edinburgh : Edinburgh University Press, 1971  viii, 290 p. ; 26 cm
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12.

図書

図書
Ivan Flores
出版情報: Englewood Cliffs, N.J. : Prentice-Hall, c1966  xii, 395 p. ; 24 cm
シリーズ名: Prentice-Hall series in applied mathematics
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13.

図書

図書
Anthony Ralston
出版情報: New York : McGraw-Hill, [1971]  xxiii, 513 p ; 23 cm
シリーズ名: McGraw-Hill computer science series
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14.

図書

図書
Charles Petzold
出版情報: Redmond, WA : Microsoft Press, c2000  iii, 393 p. ; 23 cm
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Preface to the Paperback Edition
Best Friends / Chapter 1:
Codes and Combinations / Chapter 2:
Braille and Binary Codes / Chapter 3:
Anatomy of a Flashlight / Chapter 4:
Seeing Around Corners / Chapter 5:
Telegraphs and Relays / Chapter 6:
Our Ten Digits / Chapter 7:
Alternatives to Ten / Chapter 8:
Bit by Bit by Bit / Chapter 9:
Logic and Switches / Chapter 10:
Gates (Not Bill) / Chapter 11:
A Binary Adding Machine / Chapter 12:
But What About Subtraction? / Chapter 13:
Feedback and Flip-Flops / Chapter 14:
Bytes and Hex / Chapter 15:
An Assemblage of Memory / Chapter 16:
Automation / Chapter 17:
From Abaci to Chips / Chapter 18:
Two Classic Microprocessors / Chapter 19:
ASCII and a Cast of Characters / Chapter 20:
Get on the Bus / Chapter 21:
The Operating System / Chapter 22:
Fixed Point, Floating Point / Chapter 23:
Languages High and Low / Chapter 24:
The Graphical Revolution / Chapter 25:
Acknowledgments
Bibliography
Colophon
Preface to the Paperback Edition
Best Friends / Chapter 1:
Codes and Combinations / Chapter 2:
15.

図書

図書
Vincent van Oostrom (ed.)
出版情報: Berlin ; Tokyo : Springer, c2004  x, 311 p. ; 24 cm
シリーズ名: Lecture notes in computer science ; 3091
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16.

図書

図書
Bruce Molay
出版情報: Upper Saddle River, N.J. : Prentice Hall, c2003  xxii, 530 p. ; 24 cm
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17.

図書

図書
Jeffrey E.F. Friedl
出版情報: Beijing ; Tokyo : O'Reilly, c2006  xxiv, 515 p. ; 23 cm
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18.

図書

図書
Rick Bitter, Taqi Mohiuddin, Matt Nawrocki
出版情報: Boca Raton, FL : CRC Press/Taylor & Francis Group, c2007  499 p. ; 25 cm.
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目次情報: 続きを見る
Introduction to LabVIEW / Chapter 1:
Virtual Instruments / 1.1:
The Front Panel / 1.1.1:
Block Diagram / 1.1.2:
Executing VIs / 1.1.3:
LabVIEW File Extensions / 1.1.4:
LabVIEW Projects / 1.2:
Help / 1.3:
Built-in Help / 1.3.1:
Websites / 1.3.2:
Data Flow Programming / 1.4:
Menus and Palettes / 1.5:
Front Panel Controls / 1.6:
User Control Sets / 1.6.1:
Numeric / 1.6.1.1:
Boolean / 1.6.1.2:
String & Path / 1.6.1.3:
Ring & Enum, List & Table / 1.6.1.4:
Array, Cluster, and Matrix / 1.6.1.5:
Graphs and Charts / 1.6.1.6:
String & Path and I/O / 1.6.1.7:
Block Diagram Functions / 1.7:
Structures / 1.7.1:
Sequence Structure / 1.7.1.1:
Case Structure / 1.7.1.2:
For Loop / 1.7.1.3:
While Loop / 1.7.1.4:
Event Structure / 1.7.1.5:
Disable Structure / 1.7.1.6:
Timed Structure / 1.7.1.7:
Formula Node / 1.7.1.8:
Numeric, Boolean, String, and Comparison / 1.7.2:
Array and Cluster / 1.7.3:
Timing / 1.7.4:
Dialog and User Interface / 1.7.5:
File I/O / 1.7.6:
Instrument I/O, Connectivity, and Communication / 1.7.7:
Creating Connectors / 1.7.8:
Editing Icons / 1.7.9:
Using SubVIs / 1.7.10:
VI Setup / 1.7.11:
Setting Options / 1.8:
Paths / 1.8.1:
Environment / 1.8.2:
Revision History / 1.8.4:
VI Server and Web Server / 1.8.5:
Controls/Functions Palettes / 1.8.6:
LabVIEW Features / Chapter 2:
Global and Local Variables / 2.1:
Shared Variables / 2.2:
Customizing Controls / 2.3:
Custom Controls / 2.3.1:
Type Definitions / 2.3.2:
Strict Type Definitions / 2.3.3:
Property Nodes / 2.4:
Reentrant VIs / 2.5:
Libraries (.LLB) / 2.6:
Webserver / 2.7:
Web Publishing Tool / 2.8:
Instrument Driver Tools / 2.9:
Profile Functions / 2.10:
VI Profiler / 2.10.1:
Buffer Allocations / 2.10.2:
VI Metrics / 2.10.3:
Auto SubVI Creation / 2.11:
Graphical Comparison Tools / 2.12:
Compare VIs / 2.12.1:
Compare VI Hierarchies / 2.12.2:
SCC Compare Files / 2.12.3:
Report Generation Palette / 2.13:
Application Builder / 2.14:
Sound VIs / 2.15:
Application Control / 2.16:
VI Server VIs / 2.16.1:
Menu VIs / 2.16.2:
Help VIs / 2.16.3:
Other Application Control VIs / 2.16.4:
Advanced Functions / 2.17:
Data Manipulation / 2.17.1:
Calling External Code / 2.17.2:
Synchronization / 2.17.3:
Source Code Control / 2.18:
Configuration / 2.18.1:
Adding and Modifying Files / 2.18.2:
Advanced Features / 2.18.3:
Graphs / 2.19:
Standard Graphs / 2.19.1:
3-D Graphs / 2.19.2:
Digital and Mixed Signal Graphs / 2.19.3:
Picture Graphs / 2.19.4:
Data Logging / 2.20:
Find and Replace / 2.21:
Print Documentation / 2.22:
VI History / 2.23:
Key Navigation / 2.24:
Express VIs / 2.25:
Navigation Window / 2.26:
Splitter Bar / 2.27:
Bibliography
State Machines / Chapter 3:
Introduction / 3.1:
State Machines in LabVIEW / 3.1.1:
When to Use a State Machine / 3.1.2:
Types of State Machines / 3.1.3:
Enumerated Types and Type Definitions / 3.2:
Type Definitions Used with State Machines / 3.2.1:
Creating Enumerated Constants and Type Definitions / 3.2.2:
Converting between Enumerated Types and Strings / 3.2.3:
Drawbacks to Using Type Definitions and Enumerated Controls / 3.2.4:
Sequence-Style State Machine / 3.3:
When to Use a Sequence-Style State Machine / 3.3.1:
Example / 3.3.2:
Test Executive-Style State Machine / 3.4:
The LabVIEW Template Standard State Machine / 3.4.1:
When to Use a Test Executive-Style State Machine / 3.4.2:
Recommended States for a Test Executive-Style State Machine / 3.4.3:
Determining States for Test Executive-Style State Machines / 3.4.4:
Classical-Style State Machine / 3.4.5:
When to Use a Classical-Style State Machine / 3.5.1:
Queued-Style State Machine / 3.5.2:
When to Use the Queued-Style State Machine / 3.6.1:
Example Using LabVIEW Queue Functions / 3.6.2:
Example Using an Input Array / 3.6.3:
Drawbacks to Using State Machines / 3.7:
Recommendations and Suggestions / 3.8:
Documentation / 3.8.1:
Ensure Proper Setup / 3.8.2:
Error, Open, and Close States / 3.8.3:
Status of Shift Registers / 3.8.4:
Typecasting an Index to an Enumerated Type / 3.8.5:
Make Sure You Have a Way Out / 3.8.6:
Problems/Examples / 3.9:
The Blackjack Example / 3.9.1:
The Test Sequencer Example / 3.9.2:
The PC Calculator Example / 3.9.3:
Application Structure / Chapter 4:
Planning / 4.1:
Purpose of Structure / 4.2:
Software Models / 4.3:
The Waterfall Model / 4.3.1:
The Spiral Model / 4.3.2:
Block Diagrams / 4.3.3:
Description of Logic / 4.3.4:
Project Administration / 4.4:
LabVIEW Documentation / 4.5:
Printing LabVIEW Documentation / 4.5.2:
The Three-Tiered Structure / 4.5.3:
Main Level / 4.7:
User Interface / 4.7.1:
User Interface Design / 4.7.1.1:
Property Node Examples / 4.7.1.2:
Customizing Menus / 4.7.1.3:
Exception-Handling at the Main Level / 4.7.2:
Second Level - Test Level / 4.8:
Bottom Level - Drivers / 4.9:
Style Tips / 4.10:
Sequence Structures / 4.10.1:
Nested Structures / 4.10.2:
Drivers / 4.10.3:
Polling Loops / 4.10.4:
Array Handling / 4.10.5:
The LabVIEW Project / 4.11:
Project Overview / 4.11.1:
Project File Operations / 4.11.2:
Project Library / 4.11.3:
Project File Organization / 4.11.4:
Build Specifications / 4.11.5:
Source Code Management / 4.11.6:
Summary / 4.12:
Communication Standards / Chapter 5:
GPIB / 5.1.1:
Serial Communications / 5.1.2:
VXI / 5.1.3:
LXI / 5.1.4:
VISA Definition / 5.1.5:
DDE / 5.1.6:
OLE / 5.1.7:
TCP/IP / 5.1.8:
DataSocket / 5.1.9:
Traditional DAQ / 5.1.10:
NI-DAQmx / 5.1.11:
Code Interface Node and Call Library Function / 5.1.12:
Driver Classifications / 5.2:
Configuration Drivers / 5.2.1:
Measurement Drivers / 5.2.2:
Status Drivers / 5.2.3:
Inputs/Outputs / 5.3:
Error Handling / 5.4:
NI Spy / 5.5:
NI Spy Introduction / 5.5.1:
Configuring NI Spy / 5.5.2:
Running NI Spy / 5.5.3:
Driver Guidelines / 5.6:
Reuse and Development Reduction / 5.7:
Driver Example / 5.8:
Instrument I/O Assistant / 5.9:
IVI Drivers / 5.10:
Classes of IVI Drivers / 5.10.1:
Interchangeability / 5.10.2:
Simulation / 5.10.3:
State Management / 5.10.4:
IVI Driver Installation / 5.10.5:
IVI Configuration / 5.10.6:
How to Use IVI Drivers / 5.10.7:
Soft Panels / 5.10.8:
IVI Driver Example / 5.10.9:
Exception Handling / Chapter 6:
Exception Handling Defined / 6.1:
Types of Errors / 6.2:
I/O Errors / 6.2.1:
Logical Errors / 6.2.2:
Built-in Error Handling / 6.3:
Error Cluster / 6.3.1:
Error Codes / 6.3.2:
VISA Error Handling / 6.3.3:
Simple Error Handler / 6.3.4:
General Error Handler / 6.3.5:
Find First Error / 6.3.6:
Clear Error / 6.3.7:
Performing Exception Handling / 6.4:
When? / 6.4.1:
Exception-Handling at Main Level / 6.4.2:
Programmer-Defined Errors / 6.4.3:
Managing Errors / 6.4.4:
State Machine Exception Handling / 6.4.5:
Logging Errors / 6.4.6:
External Error Handler / 6.4.7:
Proper Exit Procedure / 6.4.8:
Exception Handling Example / 6.4.9:
Debugging Code / 6.5:
Error List / 6.5.1:
Execution Highlighting / 6.5.2:
Single-Stepping / 6.5.3:
Probe Tool / 6.5.4:
Breakpoint Tool / 6.5.5:
Suspending Execution / 6.5.6:
NI Spy/GPIB Spy / 6.5.7:
Utilization of Debugging Tools / 6.5.9:
Evaluating Race Conditions / 6.5.10:
Shared Variable / 6.6:
Overview of Shared Variables / 7.1:
Single Process Variables / 7.1.1:
Network: Published Variable / 7.1.2:
Shared Variable Engine / 7.2:
Accessing the Shared Variable Engine / 7.2.1:
Shared Variable Manager / 7.2.1.1:
Windows Event Viewer / 7.2.1.2:
Windows Performance Monitor / 7.2.1.3:
Windows Task Manager / 7.2.1.4:
Shared Variable Processes and Services / 7.3:
Shared Variable Networking / 7.4:
Shared Variable Domains / 7.5:
Pitfalls of Distributed Applications / 7.6:
Shared Variables and Network Security / 7.7:
LabVIEW Specific Security Issues / 7.7.1:
.NET, ActiveX, and COM / Chapter 8:
Introduction to OLE, COM, and ActiveX / 8.1:
Definition of Related Terms / 8.1.1:
Properties and Methods / 8.1.1.1:
Interfaces / 8.1.1.2:
Clients and Servers / 8.1.1.3:
In-Process and Out-of-Process / 8.1.1.4:
The Variant / 8.1.1.5:
COM / 8.2:
ActiveX / 8.3:
Description of ActiveX / 8.4.1:
ActiveX Definitions / 8.4.2:
ActiveX Technologies / 8.4.3:
ActiveX Terminology / 8.4.3.1:
Events / 8.4.4:
Containers / 8.4.5:
How ActiveX Controls Are Used / 8.4.6:
.NET / 8.5:
Description of .NET / 8.5.1:
Common Language Runtime / 8.5.2:
Intermediate Language / 8.5.3:
Web Protocols / 8.5.4:
Assembly / 8.5.5:
Global Assembly Cache / 8.5.6:
LabVIEW and ActiveX / 8.6:
The LabVIEW ActiveX Container / 8.6.1:
Embedding Objects / 8.6.1.1:
Inserting ActiveX Controls and Documents / 8.6.1.2:
The ActiveX Palette / 8.6.2:
Automation Open and Close / 8.6.2.1:
The Property Node / 8.6.2.2:
The Invoke Node / 8.6.2.3:
Variant to Data Function / 8.6.2.4:
Using the Container versus Automation / 8.6.3:
Event Support in LabVIEW / 8.6.4:
Register Event / 8.6.4.1:
Event Callback / 8.6.4.2:
LabVIEW as ActiveX Server / 8.6.5:
LabVIEW and .NET / 8.7:
.NET Containers / 8.7.1:
.NET Palette / 8.7.2:
The VI Server / 8.8:
ActiveX and .NET Examples / 8.9:
Common Dialog Control / 8.9.1:
Progress Bar Control / 8.9.2:
Microsoft Calendar Control / 8.9.3:
Web Browser Control / 8.9.4:
Microsoft Scripting Control / 8.9.5:
Microsoft System Information Control / 8.9.6:
Microsoft Status Bar Control / 8.9.7:
Microsoft Tree View Control / 8.9.8:
Microsoft Agent / 8.9.9:
Request Objects - First Tier / 8.9.9.1:
Other First-Tier Controls / 8.9.9.2:
The Characters Object / 8.9.9.3:
The Character Control / 8.9.9.4:
Registry Editing Control / 8.9.10:
Controlling Microsoft Word / 8.9.11:
Microsoft Access Control / 8.9.12:
Instrument Control Using ActiveX / 8.9.13:
Instrument Control Using .NET / 8.9.14:
Controlling LabVIEW from Other Applications / 8.9.15:
Understanding ActiveX Error Codes / 8.9.16:
Advanced ActiveX details / 8.9.17:
Multithreading in LabVIEW / Chapter 9:
Multithreading Terminology / 9.1:
Win32 / 9.1.1:
UNIX / 9.1.2:
Multitasking / 9.1.3:
Preemptive Multithreading / 9.1.3.1:
Kernel Objects / 9.1.4:
Thread / 9.1.5:
Process / 9.1.6:
Application / 9.1.7:
Priority / 9.1.8:
How Operating Systems Determine which Threads / 9.1.8.1:
Security / 9.1.9:
Thread Safe / 9.1.10:
Thread Mechanics / 9.2:
Thread States / 9.2.1:
Scheduling Threads / 9.2.2:
Context Switching / 9.2.3:
Win32 Multithreading / 9.3:
Pthreads / 9.4:
Multithreading Problems / 9.5:
Race Conditions / 9.5.1:
Priority Inversion / 9.5.2:
Starvation / 9.5.3:
Deadlocking / 9.5.4:
Operating System Solutions / 9.5.5:
Multithreading Myths / 9.6:
The More Threads, the Merrier / 9.6.1:
More Threads, More Speed / 9.6.2:
Makes Applications More Robust / 9.6.3:
Conclusion on Myths / 9.6.4:
Hyper-Threading / 9.7:
Multithreaded LabVIEW / 9.8:
Execution Subsystems / 9.8.1:
The Run Queue / 9.8.2:
DLLs in Multithreaded LabVIEW / 9.8.3:
Customizing the Thread Configuration / 9.8.4:
Thread Count Estimation for LabVIEW / 9.9:
Same as Caller or Single Subsystem Applications / 9.9.1:
Multiple Subsystem Applications / 9.9.2:
Optimizing Vis for Threading / 9.9.3:
Using VI Priorities / 9.9.4:
Subroutines in LabVIEW / 9.10:
LabVIEW Data Types / 9.10.1:
When to Use Subroutines / 9.10.3:
Object-Oriented Programming in LabVIEW / 9.11:
What Is Object-Oriented? / 10.1:
The Class / 10.1.1:
Encapsulation / 10.1.2:
Aggregation / 10.1.3:
Inheritance / 10.1.4:
Polymorphism / 10.1.5:
Objects and Classes / 10.2:
Methods / 10.2.1:
Special Method - Constructor / 10.2.1.1:
Special Method - Destructor / 10.2.1.2:
Properties / 10.2.2:
Object Analysis / 10.3:
Object Design / 10.4:
Container Classes / 10.4.1:
Abstract Classes / 10.4.2:
Object Programming / 10.5:
Developing Objects in LabVIEW / 10.6:
Constructors / 10.6.1:
Destructors / 10.6.3:
Public Methods / 10.6.4:
Private Methods / 10.6.4.2:
Examples in Developing Instrument Drivers / 10.7:
Complex Instrument Designs / 10.7.1:
Object Template / 10.8:
Exercises / 10.9:
Index
Introduction to LabVIEW / Chapter 1:
Virtual Instruments / 1.1:
The Front Panel / 1.1.1:
19.

図書

図書
Adam Chlipala
出版情報: Cambridge, Mass. : The MIT Press, c2013  xii, 424 p. ; 24 cm
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20.

図書

図書
Donald E. Knuth
出版情報: Upper Saddle River, N.J. ; Tokyo : Addison-Wesley, c2011  xv, 883 p. ; 25 cm
シリーズ名: The art of computer programming ; v. 4A
所蔵情報: loading…
21.

図書

図書
Donald E. Knuth
出版情報: Reading, Mass. ; Tokyo : Addison-Wesley, c1998  xiii, 762 p. ; 24 cm
シリーズ名: The art of computer programming ; v. 2
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目次情報: 続きを見る
Random Numbers / 3:
Introduction
Generating Uniform Random Numbers
The Linear Congruential Method
Other Methods
Statistical Tests
General Test Procedures for Studying Random Data
Empirical Tests
Theoretical Tests
The Spectral Test
Other Types of Random Quantities
Numerical Distributions
Random Sampling and Shuffling
What Is a Random Sequence?
Summary
Arithmetic / 4:
Positional Number Systems
Floating Point Arithmetic
Single-Precision Calculations
Accuracy of Floating Point Arithmetic
Double-Precision Calculations
Distribution of Floating Point Numbers
Multiple Precision Arithmetic
The Classical Algorithms
Modular Arithmetic
How Fast Can We Multiply?
Radix Conversion
Rational Arithmetic
Fractions
The Greatest Common Divisor
Analysis of Euclid's Algorithm
Factoring into Primes
Polynomial Arithmetic
Division of Polynomials
Factorization of Polynomials
Evaluation of Powers
Evaluation of Polynomials
Manipulation of Power Series
Answers to Exercises
Tables of Numerical Quantities / Appendix A:
Fundamental Constants (decimal)
Fundamental Constants (octal)
Harmonic Numbers, Bernoulli Numbers, Fibonacci Numbers
Index to Notations / Appendix B:
Index and Glossary. 0201896842T03062003
Random Numbers / 3:
Introduction
Generating Uniform Random Numbers
22.

図書

図書
Steve Lohr
出版情報: New York : Basic Books, c2001  x, 250 p. ; 24 cm
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目次情報: 続きを見る
Acknowledgments
Introduction: The Rise of Software and the Programming Art / 1:
Fortran: The Early "Turning Point" / 2:
The Hard Lessons of the Sixties: From Exuberance to the Realities of COBOL and the IBM 360 Project / 3:
Breaking Big Iron's Grip: Unix and C / 4:
Programming for the Millions: The BASIC Story from Dartmouth to Visual Basic / 5:
The European Influence: From Algol to Pascal to C++ / 6:
A Computer of My Own: The Beginning of the PC Industry and the Story of Word / 7:
Computing for the Masses: The Long Road to "Gooey" and the Macintosh / 8:
Programming for Everyman: Just Let the Users Do It / 9:
Java: The Messy Birth of a New Language / 10:
There Has To Be a Better Way: Apache and the Open Source Movement / 11:
Afterword
Notes
References
Index
Acknowledgments
Introduction: The Rise of Software and the Programming Art / 1:
Fortran: The Early "Turning Point" / 2:
23.

図書

図書
Baoding Liu
出版情報: Berlin : Springer, c2009  xi, 202 p. ; 24 cm
シリーズ名: Studies in fuzziness and soft computing ; v. 239
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目次情報: 続きを見る
Mathematical Programming / 1:
Single-Objective Programming / 1.1:
Multiobjective Programming / 1.2:
Goal Programming / 1.3:
Dynamic Programming / 1.4:
Multilevel Programming / 1.5:
Genetic Algorithms / 2:
Representation Structure / 2.1:
Handling Constraints / 2.2:
Initialization Process / 2.3:
Evaluation Function / 2.4:
Selection Process / 2.5:
Crossover Operation / 2.6:
Mutation Operation / 2.7:
General Procedure / 2.8:
Numerical Experiments / 2.9:
Neural Networks / 3:
Basic Concepts / 3.1:
Function Approximation / 3.2:
Neuron Number Determination / 3.3:
Backpropagation Algorithm / 3.4:
Stochastic Programming / 3.5:
Random Variables / 4.1:
Expected Value Model / 4.2:
Chance-Constrained Programming / 4.3:
Dependent-Chance Programming / 4.4:
Hybrid Intelligent Algorithm / 4.5:
Fuzzy Programming / 4.6:
Fuzzy Variables / 5.1:
Hybrid Programming / 5.2:
Hybrid Variables / 6.1:
Uncertain Programming / 6.2:
Uncertain Variables / 7.1:
Uncertain Dynamic Programming / 7.2:
Uncertain Multilevel Programming / 7.6:
? Graph of Uncertain Programming / 7.7:
System Reliability Design / 8:
Problem Description / 8.1:
Stochastic Models / 8.2:
Fuzzy Models / 8.3:
Hybrid Models / 8.4:
Exercises / 8.5:
Project Scheduling Problem / 9:
Vehicle Routing Problem / 9.1:
Facility Location Problem / 10.1:
Machine Scheduling Problem / 11.1:
References / 12.1:
List of Acronyms
List of Frequently Used Symbols
Index
Mathematical Programming / 1:
Single-Objective Programming / 1.1:
Multiobjective Programming / 1.2:
24.

図書

図書
А.А. Папернов
出版情報: Москва : Изд-во "Наука," Грав. ред. физико-математической лит-ры, 1965  560 p. ; 21 cm
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25.

図書

図書
Donald E. Knuth
出版情報: Boston : Addison-Wesley, c2015  viii, 310 p. ; 24 cm
シリーズ名: The art of computer programming ; v. 4, fasc. 6
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26.

図書

図書
George W. Woolley
出版情報: San Francisco : Rinehart Press, c1971  xv, 270 p. ; 24 cm
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27.

図書

図書
Michael R. Garey, David S. Johnson
出版情報: San Francisco ; New York : W. H. Freeman, c1979  x, 338 p. ; 24 cm
シリーズ名: A series of books in the mathematical sciences
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28.

電子ブック

EB
Nathan Ensmenger
出版情報: Cambridge, Mass. ; London : MIT Press, c2010  1 online resource (x, 320 p.)
シリーズ名: History of computing ;
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29.

電子ブック

EB
Stéphane Demri, Valentin Goranko, Martin Lange
出版情報:   1 online resource (viii, 744 p.)
シリーズ名: Cambridge tracts in theoretical computer science ; 58
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30.

図書

図書
Donald E. Knuth
出版情報: Reading, Mass. ; Tokyo : Addison-Wesley, c1998  xiii, 780 p., [1] folded leaf of plates ; 24 cm
シリーズ名: The art of computer programming ; v. 3
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目次情報: 続きを見る
Sorting / 5:
Combinatorial Properties of Permutations
Inversions
Permutations of a Multiset
Runs
Tableaux and Involutions
Internal sorting
Sorting by Insertion
Sorting by Exchanging
Sorting by Selection
Sorting by Merging
Sorting by Distribution
Optimum Sorting
Minimum-Comparison Sorting
Minimum-Comparison Merging
Minimum-Comparison Selection
Networks for Sorting
External Sorting
Multiway Merging and Replacement Selection
The Polyphase Merge
The Cascade Merge
Reading Tape Backwards
The Oscillating Sort
Practical Considerations for Tape Merging
External Radix Sorting
Two-Tape Sorting
Disks and Drums
Summary, History, and Bibliography
Searching / 6:
Sequential Searching
Searching by Comparison of Keys
Searching an Ordered Table
Binary Tree Searching
Balanced Trees
Multiway Trees
Digital Searching
Hashing
Retrieval on Secondary Keys
Answers to Exercises
Tables of Numerical Quantities / Appendix A:
Fundamental Constants (decimal)
Fundamental Constants (octal)
Harmonic Numbers, Bernoulli Numbers, Fibonacci Numbers
Index to Notations / Appendix B:
Index and Glossary
Sorting / 5:
Combinatorial Properties of Permutations
Inversions
31.

図書

図書
Dustin Boswell and Trevor Foucher
出版情報: Sebastopol, CA : O'Reilly, 2011, c2012  x, 190 p. ; 24 cm
シリーズ名: Theory in practice
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32.

電子ブック

EB
Eben Upton and Gareth Halfacree
出版情報: [S.l.] : Wiley Online Library, [20--]  1 online resource (xviii, 293 p.)
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目次情報: 続きを見る
Introduction
Programming is fun!
A bit of history
So what can you do with the Raspberry Pi?
Connecting the Board / Part I:
Meet the Raspberry Pi / Chapter 1:
ARM vs. x86
Windows vs. Linux
Getting Started with the Raspberry Pi
Connecting a Display
Composite Video
HDMI Video
DSI Video
Connecting Audio
Connecting a Keyboard and Mouse
Flashing the SD Card
Flashing from Linux
Flashing from OS X
Flashing from Windows
Connecting External Storage
Connecting the Network
Wired Networking
Wireless Networking
Connecting Power
Linux System Administration / Chapter 2:
Linux: An Overview
Linux Basics
Introducing Debian
Using External Storage Devices
Creating a New User Account
File. System Layout
Logical Layout
Physical Layout
Installing and Uninstalling Software
Finding Software
Installing Software
Uninstalling Software
Upgrading Software
Troubleshooting / Chapter 3:
Keyboard and Mouse Diagnostics
Power Diagnostics
Display Diagnostics
Boot Diagnostics
Network Diagnostics
The Emergency Kernel
Network Configuration / Chapter 4:
No Encryption
WEP Encryption
WPA/WPA2 Encryption
Connecting to the Wireless Network
Partition Management / Chapter 5:
Creating a New Partition
Resizing Existing Partitions
Automatic Resizing
Manual Resizing
Moving to a Bigger SD Card
Imaging from Linux
Imaging from OS X
Imaging from Windows
Configuring the Raspberry Pi / Chapter 6:
Hardware Settings-config.txt
Modifying the Display
Boot Options
Overclocking the Raspberry Pi
Overclocking Settings
Overvoltage Settings
Disabling L2 Cache
Enabling Test Mode
Memory Partitioning-start.elf
Software Settings-cmdline.txt
Using the Pi as a Media Centre, Productivity Machine and Web Server / Part II:
The Pi as a Home Theatre PC / Chapter 7:
Playing Music at the Console
Dedicated HTPC with Rasbmc
Streaming Internet Media
Streaming Local Network Media
Configuring Rasbmc
The Pi as a Productivity Machine / Chapter 8:
Using Cloud-Based Apps
Using OpenOffice.org
Image Editing with The Gimp
The Pi as a Web Server / Chapter 9:
Installing a LAMP Stack
Installing WordPress
Programming and Hacking / Part III:
An Introduction to Scratch / Chapter 10:
Introducing Scratch
Example 1: Hello World
Example 2: Animation and Sound
Example 3: A Simple Game
Robotics and Sensors
Sensing with the PicoBoard
Robotics with LEGO
Further Reading
An Introduction to Python / Chapter 11:
Introducing Python
Example 2: Comments, Inputs, Variables and Loops
Example 3: Gaming with pygame
Example 4: Python and Networking
Hardware Hacking / Chapter 12:
Electronic Equipment
Reading Resistor Colour Codes
Sourcing Components
Online Sources
Offline Sources
Hobby Specialists
The GPIO Port
UART Serial Bus
I2C Bus
SPI Bus
Using the GPIO Port in Python
Installing the GPIO Python Library
GPIO Output: Flashing an LED
GPIO Input: Reading a Button
Moving Up From the Breadboard
A Brief Guide to Soldering
Add-on Boards / Chapter 13:
Ciseco Slice of Pi
Adafruit Prototyping Pi Plate
Fen Logic Gertboard
Appendixes / Part IV:
Python Recipes / Appendix A:
Raspberry Snake (Chapter 11, Example 3)
IRC User List (Chapter 11, Example 4)
GPIO Input and Output (Chapter 12)
HDMI Display Modes / Appendix B:
Index
Introduction
Programming is fun!
A bit of history
33.

電子ブック

EB
edited by Tim Roughgarden
出版情報:   1 online resource (xvii, 686 pages)
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34.

図書

図書
Matthias Felleisen ... [et al.]
出版情報: Cambridge, Mass. : MIT Press, c2001  xxx, 693 p. ; 24 cm
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35.

図書

図書
Thomas H. Cormen ... [et al.]
出版情報: Cambridge, Mass. : MIT Press, c2009  xix, 1292 p. ; 24 cm
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Preface
Foundations / I:
Introduction
The Role of Algorithms in Computing / 1:
Algorithms / 1.1:
Algorithms as a technology / 1.2:
Getting Started / 2:
Insertion sort / 2.1:
Analyzing algorithms / 2.2:
Designing algorithms / 2.3:
Growth of Functions / 3:
Asymptotic notation / 3.1:
Standard notations and common functions / 3.2:
Divide-and-Conquer / 4:
The maximum-subarray problem / 4.1:
Strassen's algorithm for matrix multiplication / 4.2:
The substitution method for solving recurrences / 4.3:
The recursion-tree method for solving recurrences / 4.4:
The master method for solving recurrences / 4.5:
Proof of the master theorem / 4.6:
Probabilistic Analysis and Randomized Algorithms / 5:
The hiring problem / 5.1:
Indicator random variables / 5.2:
Randomized algorithms / 5.3:
Probabilistic analysis and further uses of indicator random variables / 5.4:
Sorting and Order Statistics / II:
Heapsort / 6:
Heaps / 6.1:
Maintaining the heap property / 6.2:
Building a heap / 6.3:
The heapsort algorithm / 6.4:
Priority queues / 6.5:
Quicksort / 7:
Description of quicksort / 7.1:
Performance of quicksort / 7.2:
A randomized version of quicksort / 7.3:
Analysis of quicksort / 7.4:
Sorting in Linear Time / 8:
Lower bounds for sorting / 8.1:
Counting sort / 8.2:
Radix sort / 8.3:
Bucket sort / 8.4:
Medians and Order Statistics / 9:
Minimum and maximum / 9.1:
Selection in expected linear time / 9.2:
Selection in worst-case linear time / 9.3:
Data Structures / III:
Elementary Data Structures / 10:
Stacks and queues / 10.1:
Linked lists / 10.2:
Implementing pointers and objects / 10.3:
Representing rooted trees / 10.4:
Hash Tables / 11:
Direct-address tables / 11.1:
Hash tables / 11.2:
Hash functions / 11.3:
Open addressing / 11.4:
Perfect hashing / 11.5:
Binary Search Trees / 12:
What is a binary search tree? / 12.1:
Querying a binary search tree / 12.2:
Insertion and deletion / 12.3:
Randomly built binary search trees / 12.4:
Red-Black Trees / 13:
Properties of red-black trees / 13.1:
Rotations / 13.2:
Insertion / 13.3:
Deletion / 13.4:
Augmenting Data Structures / 14:
Dynamic order statistics / 14.1:
How to augment a data structure / 14.2:
Interval trees / 14.3:
Advanced Design and Analysis Techniques / IV:
Dynamic Programming / 15:
Rod cutting / 15.1:
Matrix-chain multiplication / 15.2:
Elements of dynamic programming / 15.3:
Longest common subsequence / 15.4:
Optimal binary search trees / 15.5:
Greedy Algorithms / 16:
An activity-selection problem / 16.1:
Elements of the greedy strategy / 16.2:
Huffman codes / 16.3:
Matroids and greedy methods / 16.4:
A task-scheduling problem as a matroid / 16.5:
Amortized Analysis / 17:
Aggregate analysis / 17.1:
The accounting method / 17.2:
The potential method / 17.3:
Dynamic tables / 17.4:
Advanced Data Structures / V:
B-Trees / 18:
Definition of B-trees / 18.1:
Basic operations on B-trees / 18.2:
Deleting a key from a B-tree / 18.3:
Fibonacci Heaps / 19:
Structure of Fibonacci heaps / 19.1:
Mergeable-heap operations / 19.2:
Decreasing a key and deleting a node / 19.3:
Bounding the maximum degree / 19.4:
van Emde Boas Trees / 20:
Preliminary approaches / 20.1:
A recursive structure / 20.2:
The van Emde Boas tree / 20.3:
Data Structures for Disjoint Sets / 21:
Disjoint-set operations / 21.1:
Linked-list representation of disjoint sets / 21.2:
Disjoint-set forests / 21.3:
Analysis of union by rank with path compression / 21.4:
Graph Algorithms / VI:
Elementary Graph Algorithms / 22:
Representations of graphs / 22.1:
Breadth-first search / 22.2:
Depth-first search / 22.3:
Topological sort / 22.4:
Strongly connected components / 22.5:
Minimum Spanning Trees / 23:
Growing a minimum spanning tree / 23.1:
The algorithms of Kruskal and Prim / 23.2:
Single-Source Shortest Paths / 24:
The Bellman-Ford algorithm / 24.1:
Single-source shortest paths in directed acyclic graphs / 24.2:
Dijkstra's algorithm / 24.3:
Difference constraints and shortest paths / 24.4:
Proofs of shortest-paths properties / 24.5:
All-Pairs Shortest Paths / 25:
Shortest paths and matrix multiplication / 25.1:
The Floyd-Warshall algorithm / 25.2:
Johnson's algorithm for sparse graphs / 25.3:
Maximum Flow / 26:
Flow networks / 26.1:
The Ford-Fulkerson method / 26.2:
Maximum bipartite matching / 26.3:
Push-relabel algorithms / 26.4:
The relabel-to-front algorithm / 26.5:
Selected Topics / VII:
Multithreaded Algorithms / 27:
The basics of dynamic multithreading / 27.1:
Multithreaded matrix multiplication / 27.2:
Multithreaded merge sort / 27.3:
Matrix Operations / 28:
Solving systems of linear equations / 28.1:
Inverting matrices / 28.2:
Symmetric positive-definite matrices and least-squares approximation / 28.3:
Linear Programming / 29:
Standard and slack forms / 29.1:
Formulating problems as linear programs / 29.2:
The simplex algorithm / 29.3:
Duality / 29.4:
The initial basic feasible solution / 29.5:
Polynomials and the FFT / 30:
Representing polynomials / 30.1:
The DFT and FFT / 30.2:
Efficient FFT implementations / 30.3:
Number-Theoretic Algorithms / 31:
Elementary number-theoretic notions / 31.1:
Greatest common divisor / 31.2:
Modular arithmetic / 31.3:
Solving modular linear equations / 31.4:
The Chinese remainder theorem / 31.5:
Powers of an element / 31.6:
The RSA public-key cryptosystem / 31.7:
Primality testing / 31.8:
Integer factorization / 31.9:
String Matching / 32:
The naive string-matching algorithm / 32.1:
The Rabin-Karp algorithm / 32.2:
String matching with finite automata / 32.3:
The Knuth-Morris-Pratt algorithm / 32.4:
Computational Geometry / 33:
Line-segment properties / 33.1:
Determining whether any pair of segments intersects / 33.2:
Finding the convex hull / 33.3:
Finding the closest pair of points / 33.4:
NP-Completeness / 34:
Polynomial time / 34.1:
Polynomial-time verification / 34.2:
NP-completeness and reducibility / 34.3:
NP-completeness proofs / 34.4:
NP-complete problems / 34.5:
Approximation Algorithms / 35:
The vertex-cover problem / 35.1:
The traveling-salesman problem / 35.2:
The set-covering problem / 35.3:
Randomization and linear programming / 35.4:
The subset-sum problem / 35.5:
Appendix: Mathematical Background / VIII:
Summations / A:
Summation formulas and properties / A.1:
Bounding summations / A.2:
Sets, Etc. / B:
Sets / B.1:
Relations / B.2:
Functions / B.3:
Graphs / B.4:
Trees / B.5:
Counting and Probability / C:
Counting / C.1:
Probability / C.2:
Discrete random variables / C.3:
The geometric and binomial distributions / C.4:
The tails of the binomial distribution / C.5:
Matrices / D:
Matrices and matrix operations / D.1:
Basic matrix properties / D.2:
Bibliography
Index
Preface
Foundations / I:
Introduction
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