Table of Contents Design Methods New CAD Framework Extends Simulation of Dynamically Reconfigurable Logic / Robinson, D. ; McGregor, G. ; Lysaght, P. Pebble |
A Language For Parametrised and Reconfigurable Hardware Design / Luk, W ; McKeeer, S |
Integrated Development Environment for Logic Synthesis Based on Dynamically Reconfigurable FPGAs / Sklyarov, V. ; Sal Monteiro, R. ; Lau, N. ; Melo, A. ; Oliveira, A. ; Kondratjuk, K |
Designing for Xilinx XC6200 FPGAs / Hartenstein, R.W. ; Herz, M. ; Gilbert, F |
General Aspects Perspectives of Reconfigurable Computing in Research, Industry and Education / Becker, J. ; Kirschbaum, A. ; Renner, F.-M. ; Glesner, M |
Field-Progammable Logic: Catalyst for New Computing Paradigms / Brebner G |
Run-Time Management of Dynamically Reconfigurable Designs / Shirazi, N. ; Luk, W. ; Cheung, P.Y.K |
Acceleration of Satisfiability Algorithms by Reconfigurable Hardware / Platzner, M. ; De Micheli G |
Prototyping / Simulation An Optimized Design Flow for Fast FPGA-Based Rapid Prototyping / Stohmann, J. ; Harbich, K. ; Olbrich, M. ; Barke, E |
A Knowledge-Based System for Prototyping on FPGAs / Krupnova, H. ; DucAnh Dinh, V. ; Saucier, G |
JVX - A Rapid Prototyping System Based on Java and FPGAs / Macketanz, R. ; Karl, W |
Prototyping New ILP Architectures Using FPGAs / Shetler, J. ; Hemme, B. ; Yang, C. ; Hinsz, C |
Development Methods CAD System for ASM and FSM Synthesis / Baranov S |
Fast Floorplanning for FPGAs / Emmert, J.M. ; Randhar, A. ; Bhatia, D |
SRAM-Based FPGAs |
A Fault Model for the Configurable Logic Modules / Renovell, M. ; Portal, J.M. ; Figueras, J. ; Zorian, Y |
Reconfigurable Hardware as Shared Resource in Multipurpose Computers / Haug, G. ; Rosenstiel, W |
Accelerators Reconfigurable Computer Array: The Bridge between High Speed Sensors and Low Speed Computing / Robinson, S.H. ; Caffrey, M.P. ; Dunham, M.E |
A Reconfigurable Engine for Real-Time Video Processing / Andreou, P. ; Derbyshire, A. ; Dupont-De-Dinechin, F. ; Rice, J. ; Siganos, D |
An FPGA Implementation of a Magnetic Bearing Controller for Mechatronic Applications System Architectures |
Exploiting Contemporary Memory Techniques in Reconfigurable Accelerators / Hoffmann, T. ; Nageldinger, U |
Self Modifying Circuitry - A Platform for Tractable Virtual Circuitry Donlin |
A. REACT: Reactive Environment for Runtime Reconfiguration / Bhatia, D. ; Kannan, P. ; Simha, K.S. ; GajjalaPurna, K.M |
Applications (1) Evaluation of the XC6200-series Architecture for Cryptographic Applications / Charlwood, S. ; James-Roxby P |
An FPGA Based Object Recognition Machine / Zakerolhosseini, A. ; Lee, P. ; Horne, E |
PCI-SCI Protocol Translations: Applying Microprogramming Concepts to FPGAs / Acher, G. ; Karl, W. ; Leberecht, M |
Instruction-Level Parallelism for Reconfigurable Computing / Callahan, T.J. ; Wawrzynek, J |
Hardware/Software Codesign |
A Hardware/Software Co-design E |
Environment for Reconfigurable Logic Systems / Lysaght, P |
Mapping Loops onto Reconfigurable Architectures / Bondalapati, K. ; Prasanna, V.K |
Speed Optimization of the ALR Circuit Using an FPGA with Embedded RAM: A Design Experience / Asaad, S. ; Warren, K |
System Development High-Level Synthesis for Dynamically Reconfigurable Hardware/Software Systems / Kress, R. ; Pyttel, A |
Dynamic Specialisation of XC6200 FPGAs by Partial Evaluation / McKay, N. ; Singh, S |
Webscope: A Circuit Debug Tool Guccione |
S.A. Algorithms on FPGAs Computing Goldbach Partitions Using Pseudo-random Bit Generator Operators on a FPGA Systolic Array / Lavenier, D. ; Saouter, Y |
Solving Boolean Satisfiability with Dynamic Hardware Configurations / Zhong, P. ; Martonosi, M. ; Ashar, P. ; Malik, S |
Modular Exponent Realization on FPGAs / Poldre, J. ; Tammemae, K.;cMandre, M |
Cost Effective 2x2 Inner Product Processors / Fehr, B. ; Szed, G |
Applications (2) A Field-Programmable Gate-Array System for Evolutionary Computation / Maruyama, T. ; Funatsu, T. ; Hoshino, T. A Transmutable Telecom System ; Miyazaki, T. ; Shirakawa, K. ; Katay" |
Table of Contents Design Methods New CAD Framework Extends Simulation of Dynamically Reconfigurable Logic / Robinson, D. ; McGregor, G. ; Lysaght, P. Pebble |
A Language For Parametrised and Reconfigurable Hardware Design / Luk, W ; McKeeer, S |
Integrated Development Environment for Logic Synthesis Based on Dynamically Reconfigurable FPGAs / Sklyarov, V. ; Sal Monteiro, R. ; Lau, N. ; Melo, A. ; Oliveira, A. ; Kondratjuk, K |